Inventor · disambiguated record
Satoru Tamada
Also filed as: TAMADA SATORU
19 granted patents·1 pending application·426 citations·filing 2000–2015
95Inventor score
Top patents by PatentIndex Score
20 records- 0195US6744670B2Non-volatile semiconductor memory deviceRENESAS TECH CORP·Filed 2002·Granted Jun 1, 2004·129 cites·17 claims
- 0294US6353553B1Nonvolatile semiconductor memory device having structure storing multivalued data and data storage system comprising the nonvolatile semiconductor memory deviceMITSUBISHI ELECTRIC CORP·Filed 2000·Granted Mar 5, 2002·119 cites·17 claims
- 0391US6380636B1Nonvolatile semiconductor memory device having an array structure suitable to high-density integrationizationMITSUBISHI ELECTRIC CORP·Filed 2000·Granted Apr 30, 2002·77 cites·18 claims
- 0486US7864585B2Multi level inhibit schemeMICRON TECHNOLOGY INC·Filed 2008·Granted Jan 4, 2011·16 cites·24 claims
- 0583US7983085B2Memory array with inverted data-line pairsMICRON TECHNOLOGY INC·Filed 2009·Granted Jul 19, 2011·12 cites·24 claims
- 0676US7755939B2System and devices including memory resistant to program disturb and methods of using, making, and operating the sameMICRON TECHNOLOGY INC·Filed 2008·Granted Jul 13, 2010·8 cites·25 claims
- 0774US8422297B2Multi level inhibit schemeTAMADA SATORU·Filed 2010·Granted Apr 16, 2013·5 cites·27 claims
- 0871US7248500B2Nonvolatile semiconductor memory device having reduced dependency of a source resistance on a position in an arrayRENESAS TECH CORP·Filed 2006·Granted Jul 24, 2007·8 cites·10 claims
- 0966US6396738B1Non-volatile semiconductor memory device capable of suppressing writing and erasure failure rateMITSUBISHI ELECTRIC CORP·Filed 2001·Granted May 28, 2002·15 cites·11 claims
- 1064US7835187B2Boosting seed voltage for a memory deviceINTEL CORP·Filed 2008·Granted Nov 16, 2010·5 cites·18 claims
- 1164US6519186B2Non-volatile semiconductor memory device configured to read data at a high speedMITSUBISHI ELECTRIC CORP·Filed 2001·Granted Feb 11, 2003·13 cites·16 claims
- 1261US8576627B2Memory array with inverted data-lines pairsTAMADA SATORU·Filed 2011·Granted Nov 5, 2013·2 cites·20 claims
- 1357US6385084B1Semiconductor memoryMITSUBISHI ELECTRIC CORP·Filed 2000·Granted May 7, 2002·11 cites·13 claims
- 1456US9536582B2Enable/disable of memory chunks during memory accessMICRON TECHNOLOGY INC·Filed 2015·Granted Jan 3, 2017·1 cites·20 claims
- 1553US8077532B2Small unit internal verify read in a memory deviceMANABE TETSUJI·Filed 2009·Granted Dec 13, 2011·3 cites·20 claims
- 1650US7983091B2Divided bitline flash memory array with local sense and signal transmissionINTEL CORP·Filed 2007·Granted Jul 19, 2011·2 cites·5 claims
- 1744US9064578B2Enable/disable of memory chunks during memory accessMICRON TECHNOLOGY INC·Filed 2012·Granted Jun 23, 2015·0 cites·22 claims
- 1844US2009248955A1Redundancy for code in romTAMADA SATORU·Filed 2008·Application pending·0 cites
- 1941US7965548B2Systems and devices including memory resistant to program disturb and methods of using, making, and operating the sameMICRON TECHNOLOGY INC·Filed 2010·Granted Jun 21, 2011·0 cites·21 claims
- 2037US8243538B2Small unit internal verify read in a memory deviceMANABE TETSUJI·Filed 2011·Granted Aug 14, 2012·0 cites·20 claims
Join the waitlist — get patent alerts
Get an alert when Satoru Tamada files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →