Inventor · disambiguated record
Sean Bergan
Also filed as: BERGAN SEAN
12 granted patents·121 citations·filing 2006–2015
91Inventor score
Technology areasG06F
Top patents by PatentIndex Score
12 records- 0190US9684750B1Concurrent design processCADENCE DESIGN SYSTEMS INC·Filed 2015·Granted Jun 20, 2017·11 cites·17 claims
- 0289US10404700B1Concurrent design processCADENCE DESIGN SYSTEMS INC·Filed 2015·Granted Sep 3, 2019·10 cites·20 claims
- 0389US9619608B1Concurrent design processCADENCE DESIGN SYSTEMS INC·Filed 2015·Granted Apr 11, 2017·7 cites·17 claims
- 0487US7536665B1User-guided autoroutingCADENCE DESIGN SYSTEMS INC·Filed 2006·Granted May 19, 2009·26 cites·11 claims
- 0586US9721052B1Concurrent design processCADENCE DESIGN SYSTEMS INC·Filed 2015·Granted Aug 1, 2017·6 cites·20 claims
- 0686US7761836B1Circuit autorouter with object oriented constraintsCADENCE DESIGN SYSTEMS INC·Filed 2006·Granted Jul 20, 2010·20 cites·27 claims
- 0782US8464196B1Method and system for routing optimally between terminals through intermediate vias in a circuit designLAWSON RANDALL SCOTT·Filed 2012·Granted Jun 11, 2013·9 cites·9 claims
- 0880US8191032B1Budgeting global constraints on local constraints in an autorouterWADLAND KEN·Filed 2009·Granted May 29, 2012·10 cites·20 claims
- 0978US8789060B1Deterministic, parallel execution with overlapping regionsWADLAND KEN·Filed 2007·Granted Jul 22, 2014·10 cites·18 claims
- 1076US8549459B1Systems for automatic circuit routing with object oriented constraintsWADLAND KEN·Filed 2010·Granted Oct 1, 2013·5 cites·15 claims
- 1171US7562330B1Budgeting global constraints on local constraints in an autorouterCADENCE DESIGN SYSTEMS INC·Filed 2006·Granted Jul 14, 2009·5 cites·18 claims
- 1267US8726222B1Method and system for routing optimally between terminals through intermediate vias in a circuit designCADENCE DESIGN SYSTEMS INC·Filed 2013·Granted May 13, 2014·2 cites·17 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →