Inventor · disambiguated record
Sean Eilert
Also filed as: EILERT SEAN · EILERT SEAN E · EILERT SEAN S
27 granted patents·6 pending applications·227 citations·filing 2002–2020
96Inventor score
Top patents by PatentIndex Score
33 records- 0195US9626327B2Memory device for a hierarchical memory architectureMICRON TECHNOLOGY INC·Filed 2015·Granted Apr 18, 2017·12 cites·25 claims
- 0293US8601202B1Full chip wear leveling in memory deviceMELCHER ROBERT·Filed 2009·Granted Dec 3, 2013·70 cites·21 claims
- 0392US7936610B1Selective refresh of single bit memory cellsMICRON TECHNOLOGY INC·Filed 2009·Granted May 3, 2011·39 cites·20 claims
- 0488US10725956B2Memory device for a hierarchical memory architectureMICRON TECHNOLOGY INC·Filed 2018·Granted Jul 28, 2020·2 cites·22 claims
- 0586US9123409B2Memory device for a hierarchical memory architectureEILERT SEAN·Filed 2009·Granted Sep 1, 2015·13 cites·28 claims
- 0686US9047191B2Error control in memory storage systemsMICRON TECHNOLOGY INC·Filed 2014·Granted Jun 2, 2015·6 cites·21 claims
- 0786US8572466B2Apparatuses, systems, devices, and methods of replacing at least partially non-functional portions of memoryBUEB CHRIS·Filed 2011·Granted Oct 29, 2013·10 cites·26 claims
- 0885US9183070B2Resting blocks of memory cells in response to the blocks being deemed to failMICRON TECHNOLOGY INC·Filed 2013·Granted Nov 10, 2015·8 cites·30 claims
- 0985US8621148B2Hierarchical memory architecture to connect mass storage devicesEILERT SEAN·Filed 2012·Granted Dec 31, 2013·7 cites·22 claims
- 1085US8239629B2Hierarchical memory architecture to connect mass storage devicesEILERT SEAN·Filed 2009·Granted Aug 7, 2012·12 cites·17 claims
- 1184US7944764B1Writing to non-volatile memory during a volatile memory refresh cycleMICRON TECHNOLOGY INC·Filed 2008·Granted May 17, 2011·14 cites·20 claims
- 1282US10031879B2Memory device for a hierarchical memory architectureMICRON TECHNOLOGY INC·Filed 2017·Granted Jul 24, 2018·2 cites·20 claims
- 1380US8635514B2Error control in memory storage systemsBUEB CHRISTOPHER·Filed 2011·Granted Jan 21, 2014·4 cites·27 claims
- 1476US8504893B1Error detection or correction of a portion of a codeword in a memory deviceBUEB CHRISTOPHER·Filed 2010·Granted Aug 6, 2013·5 cites·20 claims
- 1575US9015440B2Autonomous memory subsystem architectureEILERT SEAN·Filed 2009·Granted Apr 21, 2015·8 cites·12 claims
- 1673US10432230B2Error detection or correction of a portion of a codeword in a memory deviceMICRON TECHNOLOGY INC·Filed 2013·Granted Oct 1, 2019·4 cites·20 claims
- 1772US9779057B2Autonomous memory architectureEILERT SEAN·Filed 2009·Granted Oct 3, 2017·4 cites·16 claims
- 1872US9165688B2Apparatuses, systems, devices, and methods of replacing at least partially non-functional portions of memoryMICRON TECHNOLOGY INC·Filed 2014·Granted Oct 20, 2015·2 cites·20 claims
- 1972US8806303B2Apparatuses, systems, devices, and methods of replacing at least partially non-functional portions of memoryMICRON TECHNOLOGY INC·Filed 2013·Granted Aug 12, 2014·2 cites·22 claims
- 2067US11586577B2Autonomous memory architectureMICRON TECHNOLOGY INC·Filed 2020·Granted Feb 21, 2023·0 cites·19 claims
- 2162US9563501B2Preserving data integrity in a memory systemBUEB CHRISTOPHER·Filed 2010·Granted Feb 7, 2017·1 cites·19 claims
- 2259US10761781B2Apparatus and methods for a distributed memory system including memory nodesMICRON TECHNOLOGY INC·Filed 2018·Granted Sep 1, 2020·0 cites·20 claims
- 2354US10146617B2Error control in memory storage systemsMICRON TECHNOLOGY INC·Filed 2015·Granted Dec 4, 2018·0 cites·18 claims
- 2453US8578095B2Hierarchical memory architecture using a concentrator deviceEILERT SEAN·Filed 2009·Granted Nov 5, 2013·2 cites·20 claims
- 2553US2017351737A1Methods and systems for autonomous memory searchingMICRON TECHNOLOGY INC·Filed 2017·Application pending·0 cites
- 2651US10083122B2Transactional memoryMICRON TECHNOLOGY INC·Filed 2015·Granted Sep 25, 2018·0 cites·19 claims
- 2750US9104690B2Transactional memoryEILERT SEAN·Filed 2011·Granted Aug 11, 2015·0 cites·20 claims
- 2849US2010250798A1Hierarchical memory architecture with an interface to differing memory formatsEILERT SEAN·Filed 2009·Application pending·0 cites
- 2948US2009243813A1Wireless programming of non-volatile memory with near-field uhf couplingSMITH JOSHUA R·Filed 2008·Application pending·0 cites
- 3045US2005204090A1Hardware stack for blocked nonvolatile memoriesFiled 2004·Application pending·0 cites
- 3138US8521952B2Hierarchical memory architecture with a phase-change memory (PCM) content addressable memory (CAM)EILERT SEAN·Filed 2009·Granted Aug 27, 2013·0 cites·24 claims
- 3238US2003204675A1Method and system to retrieve information from a storage deviceFiled 2002·Application pending·0 cites
- 3336US2006004984A1Virtual memory management systemMORRIS TONIA G·Filed 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →