Virtual memory management system

Abstract

Method and apparatus to perform virtual memory management using a general memory access processor are described.

1 . A system, comprising: 
 an antenna;    a transceiver to couple to said antenna;    a processor to couple to said transceiver; and    a virtual memory system to couple with said processor, said virtual memory system comprising: 
 a primary memory unit;  
 a secondary memory unit; and  
 a general memory access processor to couple to said primary memory unit and said secondary memory unit, said general memory access processor to control virtual memory management operations for said processor using said primary memory unit and said secondary memory unit in response to requests for information received from said processor.  
   
   
   
       2 . The system of  claim 1 , further comprising a direct memory access controller to couple said primary memory unit with said secondary memory unit, said direct memory access controller to transfer information between said primary and secondary memory units in response to control signals from said general memory access processor.  
   
   
       3 . The system of  claim 1 , further comprising a buffer to store information communicated between said memory units, and between said memory units and said general memory access processor.  
   
   
       4 . The system of  claim 1 , wherein said primary memory unit comprises random access memory and said secondary memory unit comprises flash memory.  
   
   
       5 . The system of  claim 1 , wherein said general memory access processor receives a request for data from a page of information, determines whether said page is in one of said primary memory unit, said secondary memory unit, and said buffer, and retrieves said data from said page of information in accordance with said determination.  
   
   
       6 . An apparatus, comprising: 
 a primary memory unit;    a secondary memory unit; and    a general memory access processor to couple to said primary memory unit and said secondary memory unit, said general memory access processor to perform virtual memory management operations for a processor using said primary memory unit and said secondary memory unit.    
   
   
       7 . The apparatus of  claim 6 , further comprising a direct memory access controller to couple said primary memory unit with said secondary memory unit, said direct memory access controller to transfer information between said primary and secondary memory units in response to control signals from said general memory access processor.  
   
   
       8 . The apparatus of  claim 6 , further comprising a buffer to store information communicated between said memory units, and between said memory units and said general memory access processor.  
   
   
       9 . The apparatus of  claim 6 , wherein said primary memory unit comprises random access memory and said secondary memory unit comprises flash memory, with said processor to access said primary memory unit and said secondary memory unit via said general memory access processor.  
   
   
       10 . The apparatus of  claim 9 , wherein said general memory access processor is integrated with said flash memory.  
   
   
       11 . The apparatus of  claim 6 , wherein said general memory access processor is external to a memory controller.  
   
   
       12 . The apparatus of  claim 6 , wherein said general memory access processor receives a request for a data from a page of information, determines whether said page is in one of said primary memory unit, said secondary memory unit, and said buffer, and retrieves said data from said page of information in accordance with said determination.  
   
   
       13 . A method, comprising: 
 receiving a first request by a processor for information stored in a first page;    determining whether said first page is stored in a primary memory unit;    retrieving said first page from a secondary memory unit if said first page is not stored in said primary memory unit;    retrieving said information from said first page; and    sending said retrieved information to said processor in response to said first request.    
   
   
       14 . The method of  claim 13 , further comprising: 
 selecting a second page stored in said primary memory unit;    determining whether said second page has been modified;    sending a second request for said modified second page to said primary memory unit;    receiving said modified second page from said primary memory unit; and    writing said modified second page to said secondary memory unit.    
   
   
       15 . The method of  claim 14 , further comprising: 
 sending a third request for said first page to said secondary memory unit;    receiving said first page from said secondary memory unit; and    writing said first page to said primary memory unit to replace said second page.    
   
   
       16 . The method of  claim 14 , wherein said selecting comprises receiving a page number for said second page from said processor.  
   
   
       17 . The method of  claim 16 , wherein said selecting further comprises: 
 sending a fourth request for page table data to said primary memory unit;    receiving said page table data from said primary memory unit;    updating a page table with said page table data; and    sending said updated page table to said processor.    
   
   
       18 . An article comprising: 
 a storage medium;    said storage medium including stored instructions that, when executed by a processor, are operable to receive a first request by a processor for information stored in a first page, determine whether said first page is stored in a primary memory unit, retrieve said first page from a secondary memory unit if said first page is not stored in said primary memory unit, retrieve said information from said first page, and send said retrieved information to said processor in response to said first request.    
   
   
       19 . The article of  claim 18 , wherein the stored instructions, when executed by a processor, are further operable to select a second page stored in said primary memory unit, determine whether said second page has been modified, send a second request for said modified second page to said primary memory unit, receive said modified second page from said primary memory unit, and write said modified second page to said secondary memory unit.  
   
   
       20 . The article of  claim 19 , wherein the stored instructions, when executed by a processor, are further operable to send a third request for said first page to said secondary memory unit, receive said first page from said secondary memory unit, and write said first page to said primary memory unit to replace said second page.  
   
   
       21 . The article of  claim 19 , wherein the stored instructions, when executed by a processor, perform said selecting by using stored instructions operable to receive a page number for said second page from said processor.  
   
   
       22 . The article of  claim 21 , wherein the stored instructions, when executed by a processor, perform said selecting by using stored instructions operable to send a fourth request for page table data to said primary memory unit, receive said page table data from said primary memory unit, update a page table with said page table data, and send said updated page table to said processor.