Inventor · disambiguated record
Tonia G. Morris
Also filed as: MORRIS TONIA · MORRIS TONIA G
31 granted patents·7 pending applications·1,096 citations·filing 1998–2021
97Inventor score
Top patents by PatentIndex Score
38 records- 0198US6526395B1Application of personality models and interaction with synthetic characters in a computing systemINTEL CORP·Filed 1999·Granted Feb 25, 2003·419 cites·15 claims
- 0296US7289806B2Method and apparatus for context enabled searchINTEL CORP·Filed 2004·Granted Oct 30, 2007·155 cites·28 claims
- 0394US9025399B1Method for training a control signal based on a strobe signal in a memory moduleINTEL CORP·Filed 2013·Granted May 5, 2015·36 cites·25 claims
- 0491US6665010B1Controlling integration times of pixel sensorsINTEL CORP·Filed 1998·Granted Dec 16, 2003·130 cites·18 claims
- 0590US11061590B2Efficiently training memory device chip select controlINTEL CORP·Filed 2019·Granted Jul 13, 2021·7 cites·19 claims
- 0690US10416912B2Efficiently training memory device chip select controlINTEL CORP·Filed 2017·Granted Sep 17, 2019·8 cites·18 claims
- 0790US9021154B2Read training a memory controllerINTEL CORP·Filed 2013·Granted Apr 28, 2015·9 cites·20 claims
- 0890US6573936B2Method and apparatus for providing a single-instruction multiple data digital camera system that integrates on-chip sensing and parallel processingINTEL CORP·Filed 1998·Granted Jun 3, 2003·120 cites·25 claims
- 0987US9627029B2Method for training a control signal based on a strobe signal in a memory moduleINTEL CORP·Filed 2015·Granted Apr 18, 2017·9 cites·9 claims
- 1086US11360874B2Registering clock driver controlled decision feedback equalizer training processINTEL CORP·Filed 2020·Granted Jun 14, 2022·2 cites·7 claims
- 1186US10891243B2Memory bus MR register programming processINTEL CORP·Filed 2019·Granted Jan 12, 2021·4 cites·21 claims
- 1286US10482041B2Read training a memory controllerINTEL CORP·Filed 2016·Granted Nov 19, 2019·3 cites·8 claims
- 1386US10148416B2Signal phase optimization in memory interface trainingINTEL CORP·Filed 2016·Granted Dec 4, 2018·8 cites·15 claims
- 1483US10331585B2Read training a memory controllerINTEL CORP·Filed 2017·Granted Jun 25, 2019·2 cites·17 claims
- 1581US10635628B2Host controller apparatus, host controller device, and method for a host controller for determining information related to a time shift for transmitting instructions on a command and address bus, host controller and computer systemINTEL CORP·Filed 2018·Granted Apr 28, 2020·4 cites·20 claims
- 1679US12009023B2Training for chip select signal read operations by memory devicesINTEL CORP·Filed 2019·Granted Jun 11, 2024·6 cites·20 claims
- 1778US10380043B2Memory bus MR register programming processINTEL CORP·Filed 2017·Granted Aug 13, 2019·2 cites·22 claims
- 1878US6366317B1Motion estimation using intrapixel logicINTEL CORP·Filed 1998·Granted Apr 2, 2002·57 cites·27 claims
- 1977US11164847B2Methods and apparatus for managing thermal behavior in multichip packagesINTEL CORP·Filed 2019·Granted Nov 2, 2021·2 cites·20 claims
- 2076US9766817B2Read training a memory controllerINTEL CORP·Filed 2014·Granted Sep 19, 2017·2 cites·18 claims
- 2175US9058111B2Read training a memory controllerINTEL CORP·Filed 2014·Granted Jun 16, 2015·2 cites·12 claims
- 2274US8495435B2Dynamic physical memory replacement through address swappingMORRIS TONIA G·Filed 2010·Granted Jul 23, 2013·8 cites·20 claims
- 2372US10997096B2Enumerated per device addressability for memory subsystemsINTEL CORP·Filed 2018·Granted May 4, 2021·1 cites·23 claims
- 2470US9495103B2Read training a memory controllerINTEL CORP·Filed 2014·Granted Nov 15, 2016·1 cites·15 claims
- 2570US7098952B2Imager having multiple storage locations for each pixel sensorINTEL CORP·Filed 1998·Granted Aug 29, 2006·41 cites·10 claims
- 2667US11658159B2Methods and apparatus for managing thermal behavior in multichip packagesINTEL CORP·Filed 2021·Granted May 23, 2023·0 cites·20 claims
- 2766US6657663B2Pre-subtracting architecture for enabling multiple spectrum image sensingINTEL CORP·Filed 1998·Granted Dec 2, 2003·30 cites·32 claims
- 2854US2019095308A1Registering clock driver controlled decision feedback equalizer training processINTEL CORP·Filed 2017·Application pending·0 cites
- 2948US6697112B2Imaging system having multiple image capture modesINTEL CORP·Filed 1998·Granted Feb 24, 2004·12 cites·8 claims
- 3047US2004212724A1Imaging device with liquid crystal shutterFiled 2004·Application pending·0 cites
- 3147US2003189658A1Method and apparatus for providing a single-instruction multiple data digital camera system that integrates on-chip sensing and parallel processingFiled 2003·Application pending·0 cites
- 3244US2021149707A1Methods and apparatus to process data packets for logical and virtual switch acceleration in memoryINTEL CORP·Filed 2020·Application pending·0 cites
- 3343US11435909B2Device, system and method to generate link training signalsINTEL CORP·Filed 2019·Granted Sep 6, 2022·0 cites·18 claims
- 3442US6992709B1Method and apparatus for high-speed broadband illuminant discriminationINTEL CORP·Filed 1999·Granted Jan 31, 2006·8 cites·12 claims
- 3542US6741282B1Method and apparatus for processing a photocurrent in both discrete and continuous timeINTEL CORP·Filed 1998·Granted May 25, 2004·8 cites·16 claims
- 3641US2018181504A1Apparatuses and methods for training one or more signal timing relations of a memory interfaceINTEL CORP·Filed 2016·Application pending·0 cites
- 3736US2006004984A1Virtual memory management systemMORRIS TONIA G·Filed 2004·Application pending·0 cites
- 3827US2018188959A1Memory Module With Integrated TrainingTHAKKAR SHACHI K·Filed 2016·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Tonia G. Morris files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →