Inventor · disambiguated record
Shafqat Ahmed
Also filed as: AHMED SHAFQAT
27 granted patents·6 pending applications·279 citations·filing 1995–2024
96Inventor score
Top patents by PatentIndex Score
33 records- 0196US9378839B2Apparatus and methods including source gatesMICRON TECHNOLOGY INC·Filed 2014·Granted Jun 28, 2016·15 cites·18 claims
- 0296US8797806B2Apparatus and methods including source gatesGODA AKIRA·Filed 2011·Granted Aug 5, 2014·22 cites·25 claims
- 0393US9779816B2Apparatus and methods including source gatesMICRON TECHNOLOGY INC·Filed 2016·Granted Oct 3, 2017·9 cites·20 claims
- 0491US11211126B2Apparatus and methods including source gatesMICRON TECHNOLOGY INC·Filed 2020·Granted Dec 28, 2021·2 cites·20 claims
- 0591US7566915B2Guard ring extension to prevent reliability failuresINTEL CORP·Filed 2006·Granted Jul 28, 2009·25 cites·9 claims
- 0691US5602445ABlue-violet phosphor for use in electroluminescent flat panel displaysOREGON GRADUATE INST SCIENCE·Filed 1995·Granted Feb 11, 1997·103 cites·11 claims
- 0789US10170189B2Apparatus and methods including source gatesMICRON TECHNOLOGY INC·Filed 2017·Granted Jan 1, 2019·5 cites·21 claims
- 0885US7968976B2Guard ring extension to prevent reliability failuresINTEL CORP·Filed 2010·Granted Jun 28, 2011·7 cites·4 claims
- 0985US2025124982A1Apparatus and methods including source gatesMICRON TECHNOLOGY INC·Filed 2024·Application pending·0 cites
- 1084US10783967B2Apparatus and methods including source gatesMICRON TECHNOLOGY INC·Filed 2018·Granted Sep 22, 2020·3 cites·20 claims
- 1181US8174893B2Independent well bias management in a memory deviceGODA AKIRA·Filed 2009·Granted May 8, 2012·10 cites·32 claims
- 1281US6911695B2Transistor having insulating spacers on gate sidewalls to reduce overlap between the gate and doped extension regions of the source and drainINTEL CORP·Filed 2002·Granted Jun 28, 2005·25 cites·22 claims
- 1381US6537923B1Process for forming integrated circuit structure with low dielectric constant material between closely spaced apart metal linesLSI LOGIC CORP·Filed 2000·Granted Mar 25, 2003·26 cites·17 claims
- 1475US12148474B2Apparatus and methods including source gatesMICRON TECHNOLOGY INC·Filed 2021·Granted Nov 19, 2024·0 cites·20 claims
- 1567US7972909B2Guard ring extension to prevent reliability failuresINTEL CORP·Filed 2009·Granted Jul 5, 2011·2 cites·1 claims
- 1664US10409506B2Sense flags in a memory deviceMICRON TECHNOLOGY INC·Filed 2018·Granted Sep 10, 2019·0 cites·20 claims
- 1762US9135998B2Sense operation flags in a memory deviceAHMED SHAFQAT·Filed 2010·Granted Sep 15, 2015·1 cites·20 claims
- 1860US10126967B2Sense operation flags in a memory deviceMICRON TECHNOLOGY INC·Filed 2016·Granted Nov 13, 2018·0 cites·15 claims
- 1960US6495419B1Nonvolatile memory in CMOS process flowLSI LOGIC CORP·Filed 2000·Granted Dec 17, 2002·8 cites·18 claims
- 2059US11500446B2Reducing power consumption in nonvolatile memory due to standby leakage currentINTEL CORP·Filed 2019·Granted Nov 15, 2022·1 cites·21 claims
- 2158US6338992B1Programmable read only memory in CMOS process flowLSI LOGIC CORP·Filed 2000·Granted Jan 15, 2002·7 cites·18 claims
- 2256US11029861B2Sense flags in a memory deviceMICRON TECHNOLOGY INC·Filed 2019·Granted Jun 8, 2021·0 cites·20 claims
- 2355US6495881B1Programmable read only memory in CMOS process flowLSI LOGIC CORP·Filed 2001·Granted Dec 17, 2002·6 cites·2 claims
- 2453US7920419B2Isolated P-well architecture for a memory deviceINTEL CORP·Filed 2009·Granted Apr 5, 2011·2 cites·15 claims
- 2549US9519582B2Sense operation flags in a memory deviceMICRON TECHNOLOGY INC·Filed 2015·Granted Dec 13, 2016·0 cites·21 claims
- 2645US8498159B2Independent well bias management in a memory deviceGODA AKIRA·Filed 2012·Granted Jul 30, 2013·0 cites·20 claims
- 2743US11322546B2Current delivery and spike mitigation in a memory cell arrayINTEL CORP·Filed 2018·Granted May 3, 2022·0 cites·22 claims
- 2843US2018165717A1Keyword Bidding based on Search Traffic on Online Social NetworksFACEBOOK INC·Filed 2016·Application pending·0 cites
- 2937US2004056304A1Method of forming transistor having insulating spacers on gate sidewallsFiled 2003·Application pending·0 cites
- 3035US6482075B1Process for planarizing an isolation structure in a substrateLSI LOGIC CORP·Filed 2000·Granted Nov 19, 2002·0 cites·20 claims
- 3135US2008079051A1Varactor with halo implant regions of opposite polarityYUAN LUO·Filed 2006·Application pending·0 cites
- 3235US2008079116A1MOS varactorYUAN LUO·Filed 2006·Application pending·0 cites
- 3332US2014370664A1Word line and bit line processing for cross-point memoriesPANGAL KIRAN·Filed 2013·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →