Inventor · disambiguated record
Shailender Chaudhry
Also filed as: CAPRIOLI PAUL · CHAUDHRY SHAILENDER
133 granted patents·17 pending applications·2,459 citations·filing 1999–2022
99Inventor score
Files withSUN MICROSYSTEMS INC95ORACLE AMERICA INC21CHAUDHRY SHAILENDER10CAPRIOLI PAUL5KARLSSON MARTIN R3
Top patents by PatentIndex Score
150 records- 0197US7930695B2Method and apparatus for synchronizing threads on a processor that supports transactional memoryORACLE AMERICA INC·Filed 2006·Granted Apr 19, 2011·73 cites·21 claims
- 0297US7461208B1Circuitry and method for accessing an associative cache with parallel determination of data and data availabilitySUN MICROSYSTEMS INC·Filed 2005·Granted Dec 2, 2008·78 cites·20 claims
- 0397US7206903B1Method and apparatus for releasing memory locations during transactional executionSUN MICROSYSTEMS INC·Filed 2004·Granted Apr 17, 2007·158 cites·30 claims
- 0496US7818510B2Selectively monitoring stores to support transactional program executionORACLE AMERICA INC·Filed 2007·Granted Oct 19, 2010·56 cites·22 claims
- 0596US7617421B2Method and apparatus for reporting failure conditions during transactional executionSUN MICROSYSTEMS INC·Filed 2006·Granted Nov 10, 2009·60 cites·18 claims
- 0696US7398355B1Avoiding locks by transactionally executing critical sectionsSUN MICROSYSTEMS INC·Filed 2005·Granted Jul 8, 2008·67 cites·20 claims
- 0796US6938130B2Method and apparatus for delaying interfering accesses from other threads during transactional program executionSUN MICROSYSTEMS INC·Filed 2003·Granted Aug 30, 2005·107 cites·25 claims
- 0895US8327188B2Hardware transactional memory acceleration through multiple failure recoveryKARLSSON MARTIN R·Filed 2009·Granted Dec 4, 2012·64 cites·11 claims
- 0995US7389383B2Selectively unmarking load-marked cache lines during transactional program executionSUN MICROSYSTEMS INC·Filed 2006·Granted Jun 17, 2008·42 cites·10 claims
- 1095US6721944B2Marking memory elements based upon usage of accessed information during speculative executionSUN MICROSYSTEMS INC·Filed 2001·Granted Apr 13, 2004·120 cites·24 claims
- 1194US8984264B2Precise data return handling in speculative processorsKARLSSON MARTIN R·Filed 2010·Granted Mar 17, 2015·33 cites·20 claims
- 1294US6862664B2Method and apparatus for avoiding locks by speculatively executing critical sectionsSUN MICROSYSTEMS INC·Filed 2003·Granted Mar 1, 2005·99 cites·23 claims
- 1393US7676636B2Method and apparatus for implementing virtual transactional memory using cache line markingSUN MICROSYSTEMS INC·Filed 2007·Granted Mar 9, 2010·32 cites·24 claims
- 1492US10642744B2Memory type which is cacheable yet inaccessible by speculative instructionsNVIDIA CORP·Filed 2018·Granted May 5, 2020·21 cites·24 claims
- 1592US7917698B2Method and apparatus for tracking load-marks and store-marks on cache linesORACLE AMERICA INC·Filed 2007·Granted Mar 29, 2011·27 cites·23 claims
- 1691US8006073B1Simultaneous speculative threading light modeORACLE AMERICA INC·Filed 2007·Granted Aug 23, 2011·27 cites·17 claims
- 1791US7739456B1Method and apparatus for supporting very large transactionsORACLE AMERICA INC·Filed 2007·Granted Jun 15, 2010·24 cites·21 claims
- 1891US7584346B1Method and apparatus for supporting different modes of multi-threaded speculative executionSUN MICROSYSTEMS INC·Filed 2007·Granted Sep 1, 2009·25 cites·18 claims
- 1991US7509481B2Patchable and/or programmable pre-decodeSUN MICROSYSTEMS INC·Filed 2006·Granted Mar 24, 2009·26 cites·22 claims
- 2091US7293161B1Deferring loads and stores when a load buffer or store buffer fills during execute-ahead modeSUN MICROSYSTEMS INC·Filed 2005·Granted Nov 6, 2007·26 cites·18 claims
- 2191US7269694B2Selectively monitoring loads to support transactional program executionSUN MICROSYSTEMS INC·Filed 2003·Granted Sep 11, 2007·61 cites·27 claims
- 2291US7089374B2Selectively unmarking load-marked cache lines during transactional program executionSUN MICROSYSTEMS INC·Filed 2004·Granted Aug 8, 2006·55 cites·28 claims
- 2390US7730265B1Starvation-avoiding unbounded transactional memoryORACLE AMERICA INC·Filed 2007·Granted Jun 1, 2010·23 cites·21 claims
- 2489US7571304B2Generation of multiple checkpoints in a processor that supports speculative executionSUN MICROSYSTEMS INC·Filed 2005·Granted Aug 4, 2009·21 cites·16 claims
- 2588US7421465B1Arithmetic early bypassSUN MICROSYSTEMS INC·Filed 2004·Granted Sep 2, 2008·57 cites·50 claims
- 2688US7191292B2Logging of level-two cache transactions into banks of the level-two cache for system rollbackSUN MICROSYSTEMS INC·Filed 2005·Granted Mar 13, 2007·16 cites·24 claims
- 2788US6684398B2Monitor entry and exit for a speculative thread during space and time dimensional executionSUN MICROSYSTEMS INC·Filed 2001·Granted Jan 27, 2004·53 cites·22 claims
- 2887US7523266B2Method and apparatus for enforcing memory reference ordering requirements at the L1 cache levelSUN MICROSYSTEMS INC·Filed 2006·Granted Apr 21, 2009·16 cites·21 claims
- 2986US7490229B2Storing results of resolvable branches during speculative execution to predict branches during non-speculative executionSUN MICROSYSTEMS INC·Filed 2005·Granted Feb 10, 2009·16 cites·15 claims
- 3086US7257699B2Selective execution of deferred instructions in a processor that supports speculative executionSUN MICROSYSTEMS INC·Filed 2005·Granted Aug 14, 2007·16 cites·21 claims
- 3184US7673103B2Logging of level-two cache transactions into banks of the level-two cache stores the transactions for diagnostic and debugSUN MICROSYSTEMS INC·Filed 2007·Granted Mar 2, 2010·12 cites·12 claims
- 3284US7269717B2Method for reducing lock manipulation overhead during access to critical code sectionsSUN MICROSYSTEMS INC·Filed 2003·Granted Sep 11, 2007·28 cites·21 claims
- 3384US7167970B2Translating loads for accelerating virtualized partitionSUN MICROSYSTEMS INC·Filed 2005·Granted Jan 23, 2007·13 cites·30 claims
- 3484US6704862B1Method and apparatus for facilitating exception handling using a conditional trap instructionSUN MICROSYSTEMS INC·Filed 2000·Granted Mar 9, 2004·38 cites·24 claims
- 3583US7366880B2Facilitating value prediction to support speculative program executionSUN MICROSYSTEMS INC·Filed 2006·Granted Apr 29, 2008·11 cites·20 claims
- 3683US7216202B1Method and apparatus for supporting one or more servers on a single semiconductor chipSUN MICROSYSTEMS INC·Filed 2004·Granted May 8, 2007·35 cites·1 claims
- 3783US6862693B2Providing fault-tolerance by comparing addresses and data from redundant processors running in lock-stepSUN MICROSYSTEMS INC·Filed 2002·Granted Mar 1, 2005·34 cites·19 claims
- 3883US6718839B2Method and apparatus for facilitating speculative loads in a multiprocessor systemSUN MICROSYSTEMS INC·Filed 2002·Granted Apr 13, 2004·36 cites·23 claims
- 3982US6848071B2Method and apparatus for updating an error-correcting code during a partial line storeSUN MICROSYSTEMS INC·Filed 2002·Granted Jan 25, 2005·33 cites·21 claims
- 4081US8484434B2Index generation for cache memoriesCAPRIOLI PAUL·Filed 2012·Granted Jul 9, 2013·5 cites·22 claims
- 4181US6704841B2Method and apparatus for facilitating speculative stores in a multiprocessor systemSUN MICROSYSTEMS INC·Filed 2002·Granted Mar 9, 2004·31 cites·25 claims
- 4280US7904664B2Selectively monitoring loads to support transactional program executionORACLE AMERICA INC·Filed 2007·Granted Mar 8, 2011·8 cites·20 claims
- 4380US7836290B2Return address stack recovery in a speculative execution computing apparatusORACLE AMERICA INC·Filed 2006·Granted Nov 16, 2010·10 cites·11 claims
- 4479US7114060B2Selectively deferring instructions issued in program order utilizing a checkpoint and multiple deferral schemeSUN MICROSYSTEMS INC·Filed 2003·Granted Sep 26, 2006·22 cites·23 claims
- 4579US6934809B2Automatic prefetch of pointersSUN MICROSYSTEMS INC·Filed 2002·Granted Aug 23, 2005·25 cites·33 claims
- 4679US6732363B1Supporting inter-process communication through a conditional trap instructionSUN MICROSYSTEMS INC·Filed 2000·Granted May 4, 2004·28 cites·27 claims
- 4778US7689813B2Method and apparatus for enforcing membar instruction semantics in an execute-ahead processorSUN MICROSYSTEMS INC·Filed 2005·Granted Mar 30, 2010·9 cites·16 claims
- 4878US7664942B1Recovering a subordinate strand from a branch misprediction using state information from a primary strandSUN MICROSYSTEMS INC·Filed 2008·Granted Feb 16, 2010·8 cites·20 claims
- 4978US7594100B2Efficient store queue architectureSUN MICROSYSTEMS INC·Filed 2006·Granted Sep 22, 2009·8 cites·27 claims
- 5078US7549025B2Efficient marking of shared cache linesSUN MICROSYSTEMS INC·Filed 2006·Granted Jun 16, 2009·8 cites·20 claims
Showing the top 50 of 150 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →