Inventor · disambiguated record
Shih-Ked Lee
Also filed as: LEE SHIH-KED
39 granted patents·3 pending applications·998 citations·filing 1995–2025
98Inventor score
Top patents by PatentIndex Score
42 records- 0198US6281102B1Cobalt silicide structure for improving gate oxide integrity and method for fabricating sameINTEGRATED DEVICE TECH·Filed 2000·Granted Aug 28, 2001·284 cites·19 claims
- 0294US7015116B1Stress-relieved shallow trench isolation (STI) structure and method for forming the sameINTEGRATED DEVICE TECH·Filed 2004·Granted Mar 21, 2006·100 cites·14 claims
- 0394US6791155B1Stress-relieved shallow trench isolation (STI) structure and method for forming the sameINTEGRATED DEVICE TECH·Filed 2002·Granted Sep 14, 2004·107 cites·6 claims
- 0493US7582567B1Method for forming CMOS device with self-aligned contacts and region formed using salicide processINTEGRATED DEVICE TECH·Filed 2006·Granted Sep 1, 2009·26 cites·20 claims
- 0590US7214990B1Memory cell with reduced soft error rateINTEGRATED DEVICE TECH·Filed 2005·Granted May 8, 2007·20 cites·11 claims
- 0688US11935758B2Atomic layer etching for subtractive metal etchLAM RES CORP·Filed 2020·Granted Mar 19, 2024·2 cites·7 claims
- 0788US7408751B1Self-biased electrostatic discharge protection method and circuitINTEGRATED DEVICE TECH·Filed 2005·Granted Aug 5, 2008·18 cites·32 claims
- 0886US7042792B2Multi-port memory cells for use in FIFO applications that support data transfers between cache and supplemental memory arraysINTEGRATED DEVICE TECH·Filed 2004·Granted May 9, 2006·38 cites·8 claims
- 0985US10340143B1Anodic aluminum oxide as hard mask for plasma etchingLAM RES CORP·Filed 2018·Granted Jul 2, 2019·4 cites·20 claims
- 1084US11670516B2Metal-containing passivation for high aspect ratio etchLAM RES CORP·Filed 2019·Granted Jun 6, 2023·3 cites·20 claims
- 1181US12266542B2Atomic layer etching for subtractive metal etchLAM RES CORP·Filed 2024·Granted Apr 1, 2025·0 cites·9 claims
- 1281US7499303B2Binary and ternary non-volatile CAMINTEGRATED DEVICE TECH·Filed 2004·Granted Mar 3, 2009·30 cites·9 claims
- 1381US6534414B1Dual-mask etch of dual-poly gate in CMOS processingINTEGRATED DEVICE TECH·Filed 2000·Granted Mar 18, 2003·33 cites·31 claims
- 1479US7098114B1Method for forming cmos device with self-aligned contacts and region formed using salicide processINTEGRATED DEVICE TECH·Filed 2004·Granted Aug 29, 2006·22 cites·9 claims
- 1579US6025260AMethod for fabricating air gap with borderless contactINTEGRATED DEVICE TECH·Filed 1998·Granted Feb 15, 2000·51 cites·6 claims
- 1678US5767558AStructures for preventing gate oxide degradationINTEGRATED DEVICE TECH·Filed 1996·Granted Jun 16, 1998·36 cites·13 claims
- 1775US7375392B1Gate structures having sidewall spacers formed using selective depositionINTEGRATED DEVICE TECH·Filed 2006·Granted May 20, 2008·6 cites·20 claims
- 1874US6136687AMethod of forming air gaps for reducing interconnect capacitanceINTEGRATED DEVICE TECH·Filed 1997·Granted Oct 24, 2000·51 cites·14 claims
- 1974US2024395542A1High etch selectivity, low stress ashable carbon hard maskLAM RES CORP·Filed 2024·Application pending·0 cites
- 2073US6566236B1Gate structures with increased etch margin for self-aligned contact and the method of forming the sameINTEGRATED DEVICE TECH·Filed 2000·Granted May 20, 2003·16 cites·28 claims
- 2172US2025191934A1Atomic layer etching for subtractive metal etchLAM RES CORP·Filed 2025·Application pending·0 cites
- 2269US7125783B2Dielectric anti-reflective coating surface treatment to prevent defect generation in associated wet cleanINTEGRATED DEVICE TECH·Filed 2001·Granted Oct 24, 2006·14 cites·20 claims
- 2367US6872668B1Multi-step tungsten etchback process to preserve barrier integrity in an integrated circuit structureINTEGRATED DEVICE TECH·Filed 2000·Granted Mar 29, 2005·11 cites·21 claims
- 2467US6093589AMethods for preventing gate oxide degradationINTEGRATED DEVICE TECH·Filed 1997·Granted Jul 25, 2000·22 cites·9 claims
- 2565US7560800B1Die seal with reduced noise couplingINTEGRATED DEVICE TECH·Filed 2006·Granted Jul 14, 2009·3 cites·10 claims
- 2664US2025191926A1Carbon based depositions used for critical dimension control during high aspect ratio feature etches and for forming protective layersLAM RES CORP·Filed 2025·Application pending·0 cites
- 2763US12062537B2High etch selectivity, low stress ashable carbon hard maskLAM RES CORP·Filed 2020·Granted Aug 13, 2024·0 cites·34 claims
- 2863US5859458ASemiconductor device containing a silicon-rich layerINTEGRATED DEVICE TECH·Filed 1996·Granted Jan 12, 1999·18 cites·22 claims
- 2960US12249514B2Carbon based depositions used for critical dimension control during high aspect ratio feature etches and for forming protective layersLAM RES CORP·Filed 2020·Granted Mar 11, 2025·0 cites·16 claims
- 3059US7921400B1Method for forming integrated circuit device using cell library with soft error resistant logic cellsINTEGRATED DEVICE TECH·Filed 2009·Granted Apr 5, 2011·1 cites·20 claims
- 3159US6627543B1Low-temperature sputtering system and method for salicide processINTEGRATED DEVICE TECH·Filed 2000·Granted Sep 30, 2003·7 cites·7 claims
- 3258US7067364B1Gate structures having sidewall spacers using selective deposition and method of forming the sameINTEGRATED DEVICE TECH·Filed 2004·Granted Jun 27, 2006·6 cites·10 claims
- 3355US6407008B1Method of forming an oxide layerINTEGRATED DEVICE TECH·Filed 2000·Granted Jun 18, 2002·6 cites·21 claims
- 3454US5854503AMaximization of low dielectric constant material between interconnect traces of a semiconductor circuitINTEGRATED DEVICE TECH·Filed 1996·Granted Dec 29, 1998·16 cites·10 claims
- 3550US6489213B1Method for manufacturing semiconductor device containing a silicon-rich layerINTEGRATED DEVICE TECH·Filed 1996·Granted Dec 3, 2002·10 cites·26 claims
- 3649US6232647B1Air gap with borderless contactINTEGRATED DEVICE TECH·Filed 1999·Granted May 15, 2001·13 cites·10 claims
- 3747US7400026B2Thin film resistor structureINTEGRATED DEVICE TECH·Filed 2006·Granted Jul 15, 2008·0 cites·17 claims
- 3845US12435412B2High density, modulus, and hardness amorphous carbon films at low pressureLAM RES CORP·Filed 2020·Granted Oct 7, 2025·0 cites·27 claims
- 3944US5789314AMethod of topside and inter-metal oxide coatingINTEGRATED DEVICE TECH·Filed 1995·Granted Aug 4, 1998·12 cites·19 claims
- 4038US7078306B1Method for forming a thin film resistor structureINTEGRATED DEVICE TECH·Filed 2004·Granted Jul 18, 2006·0 cites·10 claims
- 4138US6306771B1Process for preventing the formation of ring defectsINTEGRATED DEVICE TECH·Filed 1999·Granted Oct 23, 2001·10 cites·11 claims
- 4232US5990009AMaximization of low dielectric constant material between interconnect traces of a semiconductor circuitINTEGRATED DEVICE TECH·Filed 1997·Granted Nov 23, 1999·2 cites·10 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →