Inventor · disambiguated record
Shahram Mostafazadeh
Also filed as: MOSTAFAZADEH SHAHRAM
51 granted patents·2 pending applications·3,448 citations·filing 1993–2012
99Inventor score
Top patents by PatentIndex Score
53 records- 0199US5894108APlastic package with exposed dieNAT SEMICONDUCTOR CORP·Filed 1997·Granted Apr 13, 1999·439 cites·3 claims
- 0298US6130473ALead frame chip scale packageNAT SEMICONDUCTOR CORP·Filed 1998·Granted Oct 10, 2000·252 cites·8 claims
- 0398US5783870AMethod for connecting packages of a stacked ball grid array structureNAT SEMICONDUCTOR CORP·Filed 1995·Granted Jul 21, 1998·350 cites·15 claims
- 0497US6683368B1Lead frame design for chip scale packageNAT SEMICONDUCTOR CORP·Filed 2000·Granted Jan 27, 2004·135 cites·17 claims
- 0596US8563345B2Integration of structurally-stable isolated capacitive micromachined ultrasonic transducer (CMUT) array cells and array elementsADLER STEVEN J·Filed 2012·Granted Oct 22, 2013·72 cites·15 claims
- 0695US5739581AHigh density integrated circuit package assembly with a heatsink between stacked diesNAT SEMICONDUCTOR CORP·Filed 1995·Granted Apr 14, 1998·226 cites·35 claims
- 0794US6034423ALead frame design for increased chip pinoutNAT SEMICONDUCTOR CORP·Filed 1998·Granted Mar 7, 2000·167 cites·10 claims
- 0894US5650659ASemiconductor component package assembly including an integral RF/EMI shieldNAT SEMICONDUCTOR CORP·Filed 1995·Granted Jul 22, 1997·205 cites·14 claims
- 0991US7838991B1Metallurgy for copper plated wafersNAT SEMICONDUCTOR CORP·Filed 2007·Granted Nov 23, 2010·16 cites·11 claims
- 1091US6689640B1Chip scale pin arrayNAT SEMICONDUCTOR CORP·Filed 2000·Granted Feb 10, 2004·60 cites·20 claims
- 1191US6468832B1Method to encapsulate bumped integrated circuit to create chip scale packageNAT SEMICONDUCTOR CORP·Filed 2000·Granted Oct 22, 2002·67 cites·20 claims
- 1291US6245595B1Techniques for wafer level molding of underfill encapsulantNAT SEMICONDUCTOR CORP·Filed 1999·Granted Jun 12, 2001·161 cites·15 claims
- 1391US5986340ABall grid array package with enhanced thermal and electrical characteristics and electronic device incorporating sameNAT SEMICONDUCTOR CORP·Filed 1996·Granted Nov 16, 1999·132 cites·9 claims
- 1490US7067927B1Die with integral pedestal having insulated wallsNAT SEMICONDUCTOR CORP·Filed 2005·Granted Jun 27, 2006·21 cites·22 claims
- 1590US6894376B1Leadless microelectronic package and a method to maximize the die size in the packageNAT SEMICONDUCTOR CORP·Filed 2003·Granted May 17, 2005·72 cites·25 claims
- 1690US6710246B1Apparatus and method of manufacturing a stackable package for a semiconductor deviceNAT SEMICONDUCTOR CORP·Filed 2002·Granted Mar 23, 2004·58 cites·15 claims
- 1789US5663593ABall grid array package with lead frameNAT SEMICONDUCTOR CORP·Filed 1995·Granted Sep 2, 1997·108 cites·8 claims
- 1889US5648679ATape ball lead integrated circuit packageNAT SEMICONDUCTOR CORP·Filed 1995·Granted Jul 15, 1997·116 cites·14 claims
- 1988US7405100B1Packaging of a semiconductor device with a non-opaque coverNAT SEMICONDUCTOR CORP·Filed 2005·Granted Jul 29, 2008·15 cites·13 claims
- 2088US7144800B2Multichip packages with exposed diceNAT SEMICONDUCTOR CORP·Filed 2004·Granted Dec 5, 2006·39 cites·8 claims
- 2188US6936929B1Multichip packages with exposed diceNAT SEMICONDUCTOR CORP·Filed 2003·Granted Aug 30, 2005·39 cites·9 claims
- 2287US6740961B1Lead frame design for chip scale packageNAT SEMICONDUCTOR CORP·Filed 2002·Granted May 25, 2004·41 cites·21 claims
- 2385US5705851AThermal ball lead integrated packageNAT SEMICONDUCTOR CORP·Filed 1995·Granted Jan 6, 1998·92 cites·11 claims
- 2484US7095096B1Microarray lead frameNAT SEMICONDUCTOR CORP·Filed 2004·Granted Aug 22, 2006·36 cites·15 claims
- 2583US7253078B1Method and apparatus for forming an underfill adhesive layerNAT SEMICONDUCTOR CORP·Filed 2002·Granted Aug 7, 2007·31 cites·32 claims
- 2681US6054772AChip sized packageNAT SEMICONDUCTOR CORP·Filed 1998·Granted Apr 25, 2000·62 cites·15 claims
- 2780US7002241B1Packaging of semiconductor device with a non-opaque coverNAT SEMICONDUCTOR CORP·Filed 2003·Granted Feb 21, 2006·24 cites·16 claims
- 2879US6984866B1Flip chip optical semiconductor on a PCBNAT SEMICONDUCTOR CORP·Filed 2003·Granted Jan 10, 2006·28 cites·14 claims
- 2979US6975038B1Chip scale pin arrayNAT SEMICONDUCTOR CORP·Filed 2003·Granted Dec 13, 2005·23 cites·21 claims
- 3077US6117710APlastic package with exposed die and method of making sameNAT SEMICONDUCTOR CORP·Filed 1998·Granted Sep 12, 2000·43 cites·6 claims
- 3176US7514769B1Micro surface mount die package and methodNAT SEMICONDUCTOR CORP·Filed 2005·Granted Apr 7, 2009·7 cites·14 claims
- 3276US7288439B1Leadless microelectronic package and a method to maximize the die size in the packageNAT SEMICONDUCTOR CORP·Filed 2005·Granted Oct 30, 2007·8 cites·15 claims
- 3370US5498901ALead frame having layered conductive planesNAT SEMICONDUCTOR CORP·Filed 1994·Granted Mar 12, 1996·43 cites·25 claims
- 3469US6888228B1Lead frame chip scale packageNAT SEMICONDUCTOR CORP·Filed 2000·Granted May 3, 2005·11 cites·28 claims
- 3569US6184575B1Ultra-thin composite package for integrated circuitsNAT SEMICONDUCTOR CORP·Filed 1994·Granted Feb 6, 2001·41 cites·14 claims
- 3668USRE39854ELead frame chip scale packageNAT SEMICONDUCTOR CORP·Filed 2002·Granted Sep 25, 2007·10 cites·9 claims
- 3768US5598321ABall grid array with heat sinkNAT SEMICONDUCTOR CORP·Filed 1995·Granted Jan 28, 1997·36 cites·19 claims
- 3865US6823582B1Apparatus and method for force mounting semiconductor packages to printed circuit boardsNAT SEMICONDUCTOR CORP·Filed 2002·Granted Nov 30, 2004·10 cites·14 claims
- 3965US6420212B1Method and apparatus to enclose diceNAT SEMICONDUCTOR CORP·Filed 2000·Granted Jul 16, 2002·12 cites·20 claims
- 4064US7171745B2Apparatus and method for force mounting semiconductor packages to printed circuit boardsNAT SEMICONDUCTOR CORP·Filed 2004·Granted Feb 6, 2007·9 cites·8 claims
- 4164US6812125B1Substrate for semiconductor packagingNAT SEMICONDUCTOR CORP·Filed 2003·Granted Nov 2, 2004·11 cites·31 claims
- 4263US7423337B1Integrated circuit device package having a support coating for improved reliability during temperature cyclingNAT SEMICONDUCTOR CORP·Filed 2003·Granted Sep 9, 2008·11 cites·20 claims
- 4363US6352878B1Method for molding a bumped waferNAT SEMICONDUCTOR CORP·Filed 2000·Granted Mar 5, 2002·11 cites·11 claims
- 4460US5569955AHigh density integrated circuit assembly combining leadframe leads with conductive tracesNAT SEMICONDUCTOR CORP·Filed 1995·Granted Oct 29, 1996·26 cites·13 claims
- 4559US7098518B1Die-level opto-electronic device and method of making sameNAT SEMICONDUCTOR CORP·Filed 2003·Granted Aug 29, 2006·7 cites·18 claims
- 4657US5442230AHigh density integrated circuit assembly combining leadframe leads with conductive tracesNAT SEMICONDUCTOR CORP·Filed 1994·Granted Aug 15, 1995·25 cites·20 claims
- 4755US7012282B1Bumped integrated circuits for optical applicationsNAT SEMICONDUCTOR CORP·Filed 2003·Granted Mar 14, 2006·5 cites·16 claims
- 4850US7468288B1Die-level opto-electronic device and method of making sameNAT SEMICONDUCTOR CORP·Filed 2006·Granted Dec 23, 2008·0 cites·21 claims
- 4950US2007037320A1Multichip packages with exposed diceNAT SEMICONDUCTOR CORP·Filed 2006·Application pending·0 cites
- 5047US2011024910A1Metallurgy for copper plated wafersNAT SEMICONDUCTOR CORP·Filed 2010·Application pending·0 cites
Showing the top 50 of 53 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →