Inventor · disambiguated record
Shay Reboh
Also filed as: REBOH SHAY
63 granted patents·66 pending applications·111 citations·filing 2014–2024
98Inventor score
Files withCOMMISSARIAT ENERGIE ATOMIQUE69IBM53COMMISSARIAT A L’ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES3COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENE ALT2COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT1
Top patents by PatentIndex Score
129 records- 0194US11081547B2Method for making superimposed transistorsCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2019·Granted Aug 3, 2021·8 cites·15 claims
- 0294US10263077B1Method of fabricating a FET transistor having a strained channelCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Apr 16, 2019·12 cites·12 claims
- 0390US10217849B2Method for making a semiconductor device with nanowire and aligned external and internal spacersCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Feb 26, 2019·7 cites·14 claims
- 0488US11469137B2Manufacturing process of an RF-SOI trapping layer substrate resulting from a crystalline transformation of a buried layerCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2020·Granted Oct 11, 2022·2 cites·20 claims
- 0588US10269930B2Method for producing a semiconductor device with self-aligned internal spacersCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Apr 23, 2019·6 cites·15 claims
- 0688US10134875B2Method for fabricating a transistor having a vertical channel having nano layersCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Nov 20, 2018·5 cites·15 claims
- 0787US10896956B2Field effect transistor with reduced contact resistanceCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Jan 19, 2021·5 cites·13 claims
- 0886US9431538B2Enhanced method of introducing a stress in a transistor channel by means of sacrificial sources/drain regions and gate replacementCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2015·Granted Aug 30, 2016·5 cites·18 claims
- 0985US10205021B1Method of fabrication of a semiconductor substrate having at least a tensilely strained semiconductor portionCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Feb 12, 2019·4 cites·15 claims
- 1085US9876121B2Method for making a transistor in a stack of superimposed semiconductor layersCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2016·Granted Jan 23, 2018·4 cites·15 claims
- 1184US9502558B2Local strain generation in an SOI substrateCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2015·Granted Nov 22, 2016·4 cites·9 claims
- 1283US10714392B2Optimizing junctions of gate all around structures with channel pull backIBM·Filed 2018·Granted Jul 14, 2020·3 cites·15 claims
- 1383US9246006B2Recrystallization of source and drain blocks from aboveCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2014·Granted Jan 26, 2016·6 cites·7 claims
- 1482US10217842B2Method for making a semiconductor device with self-aligned inner spacersCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Feb 26, 2019·3 cites·13 claims
- 1582US9343375B2Method for manufacturing a transistor in which the strain applied to the channel is increasedCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2015·Granted May 17, 2016·4 cites·19 claims
- 1680US10431683B2Method for making a semiconductor device with a compressive stressed channelCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Oct 1, 2019·3 cites·18 claims
- 1779US9966453B2Method for doping source and drain regions of a transistor by means of selective amorphisationCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2016·Granted May 8, 2018·3 cites·13 claims
- 1877US10347721B2Method to increase strain in a semiconductor region for forming a channel of the transistorCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Jul 9, 2019·2 cites·17 claims
- 1976US10600786B2Method for fabricating a device with a tensile-strained NMOS transistor and a uniaxial compression strained PMOS transistorCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Mar 24, 2020·2 cites·8 claims
- 2076US10141424B2Method of producing a channel structure formed from a plurality of strained semiconductor barsCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Nov 27, 2018·2 cites·10 claims
- 2176US10109735B2Process for fabricating a field effect transistor having a coating gateCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Oct 23, 2018·2 cites·12 claims
- 2276US9704709B2Method for causing tensile strain in a semiconductor filmCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2016·Granted Jul 11, 2017·2 cites·14 claims
- 2375US10014183B2Method for patterning a thin filmCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2015·Granted Jul 3, 2018·2 cites·17 claims
- 2474US9935019B2Method of fabricating a transistor channel structure with uniaxial strainCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2016·Granted Apr 3, 2018·2 cites·10 claims
- 2571US11217446B2Method for fabricating an integrated circuit including a NMOS transistor and a PMOS transistorCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2019·Granted Jan 4, 2022·1 cites·16 claims
- 2671US10818775B2Method for fabricating a field-effect transistorCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2018·Granted Oct 27, 2020·1 cites·13 claims
- 2771US10170621B2Method of making a transistor having a source and a drain obtained by recrystallization of semiconductorCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Jan 1, 2019·2 cites·15 claims
- 2871US9761607B2Method for producing strained semi-conductor blocks on the insulating layer of a semi-conductor on insulator substrateCOMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT·Filed 2014·Granted Sep 12, 2017·2 cites·10 claims
- 2970US10553723B2Method for forming doped extension regions in a structure having superimposed nanowiresCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2018·Granted Feb 4, 2020·1 cites·8 claims
- 3070US10147818B2Enhanced method of stressing a transistor channel zoneCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2015·Granted Dec 4, 2018·2 cites·15 claims
- 3169US11515392B2Semiconductor divice having a carbon containing insulation layer formed under the source/drainCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2021·Granted Nov 29, 2022·0 cites·13 claims
- 3268US10115590B2Manufacturing of silicon strained in tension on insulator by amorphisation then recrystallisationCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Oct 30, 2018·2 cites·19 claims
- 3368US9899217B2Method for producing a strained semiconductor on insulator substrateCOMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENE ALT·Filed 2014·Granted Feb 20, 2018·2 cites·22 claims
- 3467US11450755B2Electronic device including at least one nano-objectCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2020·Granted Sep 20, 2022·0 cites·20 claims
- 3566US12198940B2Method for modifying the strain state of a block of a semiconducting materialCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2020·Granted Jan 14, 2025·0 cites·13 claims
- 3666US11670540B2Substrates including useful layersSOITEC SILICON ON INSULATOR·Filed 2021·Granted Jun 6, 2023·0 cites·18 claims
- 3762US11575003B2Creation of stress in the channel of a nanosheet transistorIBM·Filed 2021·Granted Feb 7, 2023·0 cites·6 claims
- 3862US2025391770A1Integrated circuit including multiple device layersIBM·Filed 2024·Application pending·0 cites
- 3962US2025294875A1Backside self-aligned diffusion breaksIBM·Filed 2024·Application pending·0 cites
- 4062US2025324692A1Scaled stacked fet using combined structures in adjacent cellsIBM·Filed 2024·Application pending·0 cites
- 4162US2025359320A1Stacked transistors with vertically staggered contact viasIBM·Filed 2024·Application pending·0 cites
- 4261US2025380452A1Shaped epitaxyIBM·Filed 2024·Application pending·0 cites
- 4361US2025287694A1Backside isolation pillar removal for capacitance reductionIBM·Filed 2024·Application pending·0 cites
- 4461US2025380501A1Sidewall pinch-off of work function metalIBM·Filed 2024·Application pending·0 cites
- 4561US2025385124A1Self-aligned gate cut structureIBM·Filed 2024·Application pending·0 cites
- 4661US2025221030A1Stacked forksheet transistorsIBM·Filed 2023·Application pending·0 cites
- 4761US2025386592A1Stacked semiconductor structure with opposite polarity transistorsIBM·Filed 2024·Application pending·0 cites
- 4860US11088247B2Method of fabrication of a semiconductor device including one or more nanostructuresCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2020·Granted Aug 10, 2021·0 cites·15 claims
- 4960US2025194238A1Stacked forksheet fet with shared and/or independent gatesIBM·Filed 2023·Application pending·0 cites
- 5060US2025022711A1Method for producing a stress state in a semiconductive layerCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2024·Application pending·0 cites
Showing the top 50 of 129 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →