Inventor · disambiguated record
Shau-Lin Shue
Also filed as: SHUE SHAU-LIN
371 granted patents·84 pending applications·7,289 citations·filing 1996–2025
99Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD270TAIWAN SEMICONDUCTOR MFG144SHUE SHAU-LIN4CHANG CHUNG-LIANG3CHIOU WEN-CHIH3
Top patents by PatentIndex Score
455 records- 0199US9576814B2Method of spacer patterning to form a target integrated circuit patternTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Feb 21, 2017·3.1k cites·20 claims
- 0299US9153478B2Spacer etching process for integrated circuit designTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Oct 6, 2015·118 cites·20 claims
- 0399US7235482B2Method of manufacturing a contact interconnection layer containing a metal and nitrogen by atomic layer deposition for deep sub-micron semiconductor technologyTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Jun 26, 2007·532 cites·23 claims
- 0498US11854944B2Semiconductor packages and methods for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Dec 26, 2023·4 cites·9 claims
- 0598US11749643B2Semiconductor packages and methods for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Sep 5, 2023·4 cites·20 claims
- 0698US11569124B2Interconnect structure having an etch stop layer over conductive linesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Jan 31, 2023·4 cites·20 claims
- 0798US11538749B2Interconnect structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Dec 27, 2022·7 cites·20 claims
- 0898US11251073B2Selective deposition of barrier layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Feb 15, 2022·5 cites·20 claims
- 0998US11201106B2Semiconductor device with conductors embedded in a substrateTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Dec 14, 2021·7 cites·20 claims
- 1098US9972529B2Method of forming metal interconnectionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted May 15, 2018·35 cites·20 claims
- 1198US9613856B1Method of forming metal interconnectionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Apr 4, 2017·38 cites·20 claims
- 1297US11908792B2Semiconductor device comprising cap layer over dielectric layer and method of manufactureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Feb 20, 2024·3 cites·20 claims
- 1397US11810815B2Dielectric capping structure overlying a conductive structure to increase stabilityTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Nov 7, 2023·3 cites·20 claims
- 1497US11322395B2Dielectric capping structure overlying a conductive structure to increase stabilityTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted May 3, 2022·4 cites·20 claims
- 1597US9773676B2Lithography using high selectivity spacers for pitch reductionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Sep 26, 2017·17 cites·19 claims
- 1697US9659864B2Method and apparatus for forming self-aligned via with selectively deposited etching stop layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted May 23, 2017·24 cites·20 claims
- 1797US9177797B2Lithography using high selectivity spacers for pitch reductionTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Nov 3, 2015·28 cites·20 claims
- 1897US9123776B2Self-aligned double spacer patterning processTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Sep 1, 2015·26 cites·20 claims
- 1997US8791549B2Wafer backside interconnect structure connected to TSVsCHEN MING-FA·Filed 2010·Granted Jul 29, 2014·29 cites·19 claims
- 2097US6342448B1Method of fabricating barrier adhesion to low-k dielectric layers in a copper damascene processTAIWAN SEMICONDUCTOR MFG·Filed 2000·Granted Jan 29, 2002·197 cites·20 claims
- 2196US11929326B2Method of forming graphene barrier layer in interconnect structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Mar 12, 2024·2 cites·20 claims
- 2296US11854963B2Semiconductor interconnection structure and methods of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Dec 26, 2023·3 cites·20 claims
- 2396US11742239B2Methods of performing chemical-mechanical polishing process in semiconductor devicesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Aug 29, 2023·2 cites·20 claims
- 2496US11355430B2Capping layer overlying dielectric structure to increase reliabilityTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Jun 7, 2022·4 cites·20 claims
- 2596US9892933B2Lithography using multilayer spacer for reduced spacer footingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Feb 13, 2018·15 cites·20 claims
- 2696US9530737B1Semiconductor device and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Dec 27, 2016·15 cites·25 claims
- 2796US9418868B1Method of fabricating semiconductor device with reduced trench distortionsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Aug 16, 2016·11 cites·20 claims
- 2896US6271136B1Multi-step plasma process for forming TiSiN barrierTAIWAN SEMICONDUCTOR MFG·Filed 2000·Granted Aug 7, 2001·128 cites·39 claims
- 2995US11854987B2Semiconductor packages with interconnection features in a seal region and methods for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Dec 26, 2023·2 cites·20 claims
- 3095US11309241B2Protection liner on interconnect wire to enlarge processing window for overlying interconnect viaTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Apr 19, 2022·3 cites·20 claims
- 3195US11205618B2Graphene barrier layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Dec 21, 2021·8 cites·20 claims
- 3295US10163786B2Method of forming metal interconnectionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Dec 25, 2018·11 cites·20 claims
- 3395US9978708B2Wafer backside interconnect structure connected to TSVsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted May 22, 2018·9 cites·20 claims
- 3495US8466059B2Multi-layer interconnect structure for stacked diesCHANG HUNG-PIN·Filed 2010·Granted Jun 18, 2013·32 cites·19 claims
- 3595US7883991B1Temporary carrier bonding and detaching processesTAIWAN SEMICONDUCTOR MFG·Filed 2010·Granted Feb 8, 2011·123 cites·20 claims
- 3695US7193327B2Barrier structure for semiconductor devicesTAIWAN SEMICONDUCTOR MFG·Filed 2005·Granted Mar 20, 2007·43 cites·17 claims
- 3794US12512403B2Method of forming semiconductor device comprising conductive feature, dielectric layer adjacent conductive feature, and etch stop layer on top surface of dielectric layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Granted Dec 30, 2025·1 cites·20 claims
- 3894US12176246B2Dielectric capping structure overlying a conductive structure to increase stabilityTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Dec 24, 2024·1 cites·20 claims
- 3994US12094848B2Semiconductor packages and methods for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Sep 17, 2024·2 cites·20 claims
- 4094US11901349B2Semiconductor packages and methods for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Feb 13, 2024·2 cites·20 claims
- 4194US10014175B2Lithography using high selectivity spacers for pitch reductionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Jul 3, 2018·7 cites·20 claims
- 4294US9728485B1Semiconductor device with interconnect structure having catalys layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Aug 8, 2017·10 cites·20 claims
- 4394US9627206B2Method of double patterning lithography process using plurality of mandrels for integrated circuit applicationsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Apr 18, 2017·9 cites·20 claims
- 4494US9437540B2Additional etching to increase via contact areaTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Sep 6, 2016·14 cites·20 claims
- 4594US9431297B2Method of forming an interconnect structure for a semiconductor deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Aug 30, 2016·15 cites·20 claims
- 4694US7700479B2Cleaning processes in the formation of integrated circuit interconnect structuresTAIWAN SEMICONDUCTOR MFG·Filed 2006·Granted Apr 20, 2010·33 cites·12 claims
- 4793US12132000B2Semiconductor device structure and methods of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Oct 29, 2024·2 cites·20 claims
- 4893US12068193B2Semiconductor device structure with interconnect structure having air gapTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Aug 20, 2024·2 cites·20 claims
- 4993US10312139B2Interconnect structure having an etch stop layer over conductive linesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Jun 4, 2019·6 cites·20 claims
- 5093US9922927B2Method and apparatus for forming self-aligned via with selectively deposited etching stop layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Mar 20, 2018·6 cites·20 claims
Showing the top 50 of 455 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →