Inventor · disambiguated record
Shou-Yi Wang
Also filed as: WANG SHOU-YI
13 granted patents·5 pending applications·20 citations·filing 2011–2025
87Inventor score
Top patents by PatentIndex Score
18 records- 0191US11171090B2Semiconductor device and method of manufactureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Nov 9, 2021·6 cites·20 claims
- 0291US11088059B2Package structure, RDL structure comprising redistribution layer having ground plates and signal lines and method of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Aug 10, 2021·5 cites·20 claims
- 0388US10756038B1Semiconductor package and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Aug 25, 2020·4 cites·20 claims
- 0487US11670575B2Package structure, RDL structure comprising redistribution layer having ground plates and signal linesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Jun 6, 2023·1 cites·20 claims
- 0580US12249564B2Package structure, RDL structure comprising redistribution layer having ground plates and signal linesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Mar 11, 2025·0 cites·20 claims
- 0677US2025183143A1Method of forming package structure, rdl structure comprising redistribution layer having ground plates and signal linesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 0777US2024222307A1Integrated circuit packagesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 0877US2025079326A1Semiconductor package and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 0975US8976529B2Lid design for reliability enhancement in flip chip packageLIN WEN-YI·Filed 2011·Granted Mar 10, 2015·4 cites·20 claims
- 1074US11961814B2Integrated circuit package and methodTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Apr 16, 2024·0 cites·20 claims
- 1167US11239193B2Integrated circuit package and methodTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Feb 1, 2022·0 cites·20 claims
- 1265US10879201B2Semiconductor package for wafer level packaging and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Dec 29, 2020·0 cites·20 claims
- 1363US12183682B2Semiconductor package and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Dec 31, 2024·0 cites·20 claims
- 1460US2025199251A1Integrated fiber array unit structure including embedded passive optical components and method for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 1555US2024387447A1Semiconductor device and method for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 1654US11177218B2Package including metallic bolstering pattern and manufacturing method of the packageTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Nov 16, 2021·0 cites·20 claims
- 1751US9646928B2Semiconductor arrangement and formation thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted May 9, 2017·0 cites·20 claims
- 1849US9812416B2Semiconductor arrangement and formation thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Nov 7, 2017·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →