Inventor · disambiguated record
Siegfried K. Wiedmann
Also filed as: WIEDMANN SIEGFRIED · WIEDMANN SIEGFRIED K · WIEDMANN SIEGFRIED KURT
36 granted patents·547 citations·filing 1974–1995
98Inventor score
Top patents by PatentIndex Score
36 records- 0191US5477489AHigh-stability CMOS multi-port register file memory cell with column isolation and current-mirror row line driverEXPONENTIAL TECHN INC·Filed 1995·Granted Dec 19, 1995·93 cites·21 claims
- 0284US4090255ACircuit arrangement for operating a semiconductor memory systemIBM·Filed 1976·Granted May 16, 1978·27 cites·9 claims
- 0383US5453949ABiCMOS Static RAM with active-low word lineEXPONENTIAL TECHN INC·Filed 1994·Granted Sep 26, 1995·52 cites·15 claims
- 0482US3955210AElimination of SCR structureIBM·Filed 1974·Granted May 4, 1976·29 cites·11 claims
- 0579US4338622ASelf-aligned semiconductor circuits and process thereforIBM·Filed 1979·Granted Jul 6, 1982·24 cites·24 claims
- 0678US4254428ASelf-aligned Schottky diode structure and method of fabricationIBM·Filed 1979·Granted Mar 3, 1981·25 cites·7 claims
- 0775US4027176ASense circuit for memory storage systemIBM·Filed 1975·Granted May 31, 1977·18 cites·12 claims
- 0873US4158237AMonolithically integrated storage cellsIBM·Filed 1978·Granted Jun 12, 1979·15 cites·8 claims
- 0971US4023148AWrite speed-up circuit for integrated data memoriesIBM·Filed 1975·Granted May 10, 1977·14 cites·11 claims
- 1070US4122548AMemory storage array with restore circuitIBM·Filed 1977·Granted Oct 24, 1978·13 cites·10 claims
- 1169US4694433ASemiconductor memory having subarrays and partial word linesIBM·Filed 1985·Granted Sep 15, 1987·25 cites·5 claims
- 1268US4785341AInterconnection of opposite conductivity type semiconductor regionsIBM·Filed 1987·Granted Nov 15, 1988·34 cites·2 claims
- 1367US4035664ACurrent hogging injection logicIBM·Filed 1975·Granted Jul 12, 1977·16 cites·25 claims
- 1464US4007451AMethod and circuit arrangement for operating a highly integrated monolithic information storeIBM·Filed 1975·Granted Feb 8, 1977·11 cites·20 claims
- 1563US4521873AMethod of and circuit arrangement for reading an integrated semiconductor store with storage cells in MTL (I2 L) technologyIBM·Filed 1982·Granted Jun 4, 1985·15 cites·2 claims
- 1661US4280198AMethod and circuit arrangement for controlling an integrated semiconductor memoryIBM·Filed 1979·Granted Jul 21, 1981·9 cites·8 claims
- 1760US4070656ARead/write speed up circuit for integrated data memoriesIBM·Filed 1976·Granted Jan 24, 1978·9 cites·16 claims
- 1859US4306159ABipolar inverter and NAND logic circuit with extremely low DC standby powerIBM·Filed 1979·Granted Dec 15, 1981·8 cites·25 claims
- 1957US4596000ASemiconductor memoryIBM·Filed 1984·Granted Jun 17, 1986·10 cites·10 claims
- 2056US3956641AComplementary transistor circuit for carrying out boolean functionsIBM·Filed 1975·Granted May 11, 1976·10 cites·33 claims
- 2155US4274891AMethod of fabricating buried injector memory cell formed from vertical complementary bipolar transistor circuits utilizing mono-poly depositionIBM·Filed 1979·Granted Jun 23, 1981·15 cites·34 claims
- 2254US4425574ABuried injector memory cell formed from vertical complementary bipolar transistor circuits and method of fabrication thereforIBM·Filed 1981·Granted Jan 10, 1984·16 cites·7 claims
- 2349US4412312AMultiaddressable highly integrated semiconductor storageIBM·Filed 1981·Granted Oct 25, 1983·7 cites·8 claims
- 2446US4458162ATTL Logic gateIBM·Filed 1981·Granted Jul 3, 1984·6 cites·4 claims
- 2543US5467311ACircuit for increasing data-valid time which incorporates a parallel latchIBM·Filed 1990·Granted Nov 14, 1995·9 cites·15 claims
- 2641US4992981ADouble-ended memory cell array using interleaved bit lines and method of fabrication thereforeIBM·Filed 1989·Granted Feb 12, 1991·9 cites·19 claims
- 2741US4319344AMethod and circuit arrangement for discharging bit line capacitances of an integrated semiconductor memoryIBM·Filed 1980·Granted Mar 9, 1982·4 cites·9 claims
- 2838US4346458AI2 L Monolithically integrated storage arrangementIBM·Filed 1980·Granted Aug 24, 1982·6 cites·14 claims
- 2938US4158783ACurrent hogging injection logic with self-aligned output transistorsIBM·Filed 1977·Granted Jun 19, 1979·4 cites·9 claims
- 3034US5121357AStatic random access split-emitter memory cell selection arrangement using bit line prechargeIBM·Filed 1990·Granted Jun 9, 1992·3 cites·14 claims
- 3134US4313177AStorage cell simulation for generating a reference voltage for semiconductor stores in mtl technologyIBM·Filed 1980·Granted Jan 26, 1982·3 cites·6 claims
- 3233US4535425AHighly integrated, high-speed memory with bipolar transistorsIBM·Filed 1982·Granted Aug 13, 1985·1 cites·8 claims
- 3330US4626710ALow power logic circuit with storage charge control for fast switchingIBM·Filed 1985·Granted Dec 2, 1986·1 cites·14 claims
- 3430US4334294ARestore circuit for a semiconductor storageIBM·Filed 1980·Granted Jun 8, 1982·0 cites·2 claims
- 3530US4259730AIIL With partially spaced collarsIBM·Filed 1979·Granted Mar 31, 1981·2 cites·10 claims
- 3627US4713814AStability testing of semiconductor memoriesIBM·Filed 1986·Granted Dec 15, 1987·4 cites·14 claims
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