Inventor · disambiguated record
Steve Cho
Also filed as: CHO STEVE · CHO STEVE S · CHO STEVE SUNGYEOL
19 granted patents·19 pending applications·35 citations·filing 2016–2025
91Inventor score
Top patents by PatentIndex Score
38 records- 0196US11373972B2Microelectronic structures including bridgesINTEL CORP·Filed 2020·Granted Jun 28, 2022·9 cites·18 claims
- 0294US10431537B1Electromigration resistant and profile consistent contact arraysINTEL CORP·Filed 2018·Granted Oct 1, 2019·11 cites·26 claims
- 0390US11309239B2Electromigration resistant and profile consistent contact arraysINTEL CORP·Filed 2020·Granted Apr 19, 2022·2 cites·20 claims
- 0489US11935857B2Surface finishes with low RBTV for fine and mixed bump pitch architecturesINTEL CORP·Filed 2022·Granted Mar 19, 2024·1 cites·22 claims
- 0585US10297563B2Copper seed layer and nickel-tin microbump structuresINTEL CORP·Filed 2016·Granted May 21, 2019·4 cites·11 claims
- 0684US11088103B2First layer interconnect first on carrier approach for EMIB patchINTEL CORP·Filed 2018·Granted Aug 10, 2021·3 cites·20 claims
- 0781US11488918B2Surface finishes with low rBTV for fine and mixed bump pitch architecturesINTEL CORP·Filed 2018·Granted Nov 1, 2022·3 cites·15 claims
- 0877US12362250B2Protruding SN substrate features for epoxy flow controlINTEL CORP·Filed 2024·Granted Jul 15, 2025·0 cites·19 claims
- 0977US2025273599A1Soldered metallic reservoirs for enhanced transient and steady-state thermal performanceINTEL CORP·Filed 2025·Application pending·0 cites
- 1076US12354992B2First layer interconnect first on carrier approach for EMIB patchINTEL CORP·Filed 2022·Granted Jul 8, 2025·0 cites·16 claims
- 1176US12009271B2Protruding SN substrate features for epoxy flow controlINTEL CORP·Filed 2019·Granted Jun 11, 2024·2 cites·26 claims
- 1276US11699648B2Electromigration resistant and profile consistent contact arraysTAHOE RES LTD·Filed 2022·Granted Jul 11, 2023·0 cites·20 claims
- 1375US12334453B2Soldered metallic reservoirs for enhanced transient and steady-state thermal performanceINTEL CORP·Filed 2023·Granted Jun 17, 2025·0 cites·20 claims
- 1470US12456705B2First layer interconnect first on carrier approach for EMIB patchINTEL CORP·Filed 2021·Granted Oct 28, 2025·0 cites·18 claims
- 1564US11735558B2Microelectronic structures including bridgesINTEL CORP·Filed 2022·Granted Aug 22, 2023·0 cites·16 claims
- 1662US10854541B2Electromigration resistant and profile consistent contact arraysINTEL CORP·Filed 2019·Granted Dec 1, 2020·0 cites·24 claims
- 1758US12341117B2Methods and apparatus to reduce defects in interconnects between semiconductor dies and package substratesINTEL CORP·Filed 2021·Granted Jun 24, 2025·0 cites·25 claims
- 1858US2025218998A1Low temperature solder interconnect for package pitch scalingINTEL CORP·Filed 2023·Application pending·0 cites
- 1956US2025201720A1Methods, systems, apparatus, and articles of manufacture to reduce intermetallic compound formation in integrated circuit packagesINTEL CORP·Filed 2023·Application pending·0 cites
- 2056US2025006671A1Semiconductor layer with dry deposition layerINTEL CORP·Filed 2023·Application pending·0 cites
- 2155US2024194548A1Apparatus and method for electroless surface finishing on glassINTEL CORP·Filed 2022·Application pending·0 cites
- 2255US2025112164A1Controlling substrate bump heightINTEL CORP·Filed 2023·Application pending·0 cites
- 2354US2021035921A1Soldered metallic reservoirs for enhanced transient and steady-state thermal performanceINTEL CORP·Filed 2019·Application pending·0 cites
- 2453US12334422B2Methods and apparatus to reduce defects in interconnects between semicondcutor dies and package substratesINTEL CORP·Filed 2021·Granted Jun 17, 2025·0 cites·24 claims
- 2553US2025106982A1Nanotwin liner for through glass viasINTEL CORP·Filed 2023·Application pending·0 cites
- 2653US2025218911A1Electrolytic cobalt-iron-palladium-gold as a surface finish for embedded die attachmentsINTEL CORP·Filed 2023·Application pending·0 cites
- 2753US2025219002A1Electrolytic indium-palladium-gold as a surface finish for embedded die attachmentsINTEL CORP·Filed 2023·Application pending·0 cites
- 2852US2023343769A1Packaging architecture for wafer-scale known-good-die to known-good-die hybrid bondingINTEL CORP·Filed 2022·Application pending·0 cites
- 2951US12068172B2Sacrificial pads to prevent galvanic corrosion of FLI bumps in EMIB packagesINTEL CORP·Filed 2019·Granted Aug 20, 2024·0 cites·13 claims
- 3051US2024096809A1Microelectronic assemblies with mixed copper and solder interconnects having different thicknessesINTEL CORP·Filed 2022·Application pending·0 cites
- 3150US2024105575A1Electrolytic surface finish architectureINTEL CORP·Filed 2022·Application pending·0 cites
- 3249US2024006298A1Substrate having one or more electrical interconnectsINTEL CORP·Filed 2022·Application pending·0 cites
- 3348US2023091379A1First level interconnect under bump metallizations for fine pitch heterogeneous applicationsINTEL CORP·Filed 2021·Application pending·0 cites
- 3447US11776864B2Corner guard for improved electroplated first level interconnect bump height rangeINTEL CORP·Filed 2019·Granted Oct 3, 2023·0 cites·25 claims
- 3545US2023086180A1Deformable semiconductor device connectionINTEL CORP·Filed 2021·Application pending·0 cites
- 3644US2023086649A1Semiconductor Chip Package Having Internal I/O Structures With Modulated Thickness To Compensate For Die/Substrate WarpageINTEL CORP·Filed 2021·Application pending·0 cites
- 3743US2023096835A1Methods and apparatus to reduce defects in interconnects between semicondcutor dies and package substratesINTEL CORP·Filed 2021·Application pending·0 cites
- 3841US2021066162A1Semiconductor package with attachment and/or stop structuresINTEL CORP·Filed 2019·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →