Inventor · disambiguated record
Sylvain Barraud
Also filed as: BARRAUD SYLVAIN
20 granted patents·11 pending applications·47 citations·filing 2013–2025
91Inventor score
Files withCOMMISSARIAT ENERGIE ATOMIQUE29COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT1COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERG1
Top patents by PatentIndex Score
31 records- 0190US10217849B2Method for making a semiconductor device with nanowire and aligned external and internal spacersCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Feb 26, 2019·7 cites·14 claims
- 0286US8969148B2Method for producing a transistor structure with superimposed nanowires and with a surrounding gateCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2013·Granted Mar 3, 2015·17 cites·10 claims
- 0385US9876121B2Method for making a transistor in a stack of superimposed semiconductor layersCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2016·Granted Jan 23, 2018·4 cites·15 claims
- 0484US11152360B2Architecture of N and P transistors superposed with canal structure formed of nanowiresCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2019·Granted Oct 19, 2021·3 cites·6 claims
- 0584US9853124B2Method for fabricating a nanowire semiconductor transistor having an auto-aligned gate and spacersCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2016·Granted Dec 26, 2017·4 cites·14 claims
- 0682US10522669B2Quantum box device comprising dopants located in a thin semiconductor layerCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Dec 31, 2019·4 cites·13 claims
- 0777US10903349B2Electronic component with multiple quantum islandsCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2019·Granted Jan 26, 2021·2 cites·22 claims
- 0871US11398593B2Method for producing an electronic component with double quantum dotsCOMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERG·Filed 2018·Granted Jul 26, 2022·2 cites·10 claims
- 0970US11088259B2Method of manufacturing an electronic component including multiple quantum dotsCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2019·Granted Aug 10, 2021·1 cites·14 claims
- 1063US9276073B2Nanowire and planar transistors co-integrated on utbox SOI substrateCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2014·Granted Mar 1, 2016·1 cites·13 claims
- 1161US12237330B2Architecture with stacked N and P transistors with a channel structure formed of nanowiresCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2021·Granted Feb 25, 2025·0 cites·12 claims
- 1260US9728405B2Nanowire semiconductor device partially surrounded by a gateCOMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT·Filed 2014·Granted Aug 8, 2017·2 cites·7 claims
- 1360US2025151303A1Method for producing a microelectronic device based on a semi-metallic materialCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2024·Application pending·0 cites
- 1460US2025151328A1Microelectronic device comprising a wrapping grid and method for producing such a deviceCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2024·Application pending·0 cites
- 1560US2025159977A1Method of producing a device with superimposed transistorsCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2024·Application pending·0 cites
- 1660US2025120124A1Method for producing a microelectronic device comprising a wrapping gridCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2024·Application pending·0 cites
- 1760US2025151314A1Microelectronic device comprising a wrapping grid and method for producing such a deviceCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2024·Application pending·0 cites
- 1858US2024215263A1Memory device comprising large contact surfaces between the conduction channel and the contact regionsCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2023·Application pending·0 cites
- 1958US2024213359A1Microelectronic device comprising large contact surfaces between the conduction channel and the source and drain regionsCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2023·Application pending·0 cites
- 2058US2024234573A1Microelectronic fet device including large contact surfaces between the conduction channel and the source and drain regionsCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2023·Application pending·0 cites
- 2158US2025386595A1Cfet type transistor deviceCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2025·Application pending·0 cites
- 2257US12389644B2Method for manufacturing a transistor with a gate-all-around structureCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2022·Granted Aug 12, 2025·0 cites·15 claims
- 2357US2024154036A1Stack of monocrystalline layers for producing microelectronic devices with 3d architectureCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2023·Application pending·0 cites
- 2456US12342617B2Microelectronic device with two field-effect transistorsCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2023·Granted Jun 24, 2025·0 cites·19 claims
- 2551US9425255B2Nanowire and planar transistors co-integrated on utbox SOI substrateCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2015·Granted Aug 23, 2016·0 cites·5 claims
- 2650US11889704B2Device comprising wrap-gate transistors and method of manufacturing such a deviceCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2020·Granted Jan 30, 2024·0 cites·7 claims
- 2749US11532670B23D memory and manufacturing processCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2020·Granted Dec 20, 2022·0 cites·15 claims
- 2844US11239374B2Method of fabricating a field effect transistorCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2019·Granted Feb 1, 2022·0 cites·15 claims
- 2943US2019148367A13d circuit with n and p junctionless transistorsCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2018·Application pending·0 cites
- 3038US9911841B2Single-electron transistor and its fabrication methodCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2016·Granted Mar 6, 2018·0 cites·18 claims
- 3133US12272398B2Three-dimensional structure of memories for in-memory computingCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2023·Granted Apr 8, 2025·0 cites·15 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →