Inventor · disambiguated record
Tao Chu
Also filed as: CHU TAO · CHU TAO-PENG
11 granted patents·64 pending applications·4 citations·filing 2009–2025
80Inventor score
Top patents by PatentIndex Score
75 records- 0180US11158635B2Low leakage gate stack for a transistor device and methods of making an IC product that includes such a transistor deviceGLOBALFOUNDRIES US INC·Filed 2020·Granted Oct 26, 2021·2 cites·20 claims
- 0280US10294037B1Carrier monitoring system and method thereofINVENTEC PUDONG TECH CORP·Filed 2018·Granted May 21, 2019·2 cites·10 claims
- 0371US2025324690A1Nanoribbon-based transistors with etch stop layer to assist subfin removalINTEL CORP·Filed 2025·Application pending·0 cites
- 0470US2025323127A1Integrated circuit structure with deep via bar width tuningINTEL CORP·Filed 2025·Application pending·0 cites
- 0569US2025324697A1Mitigating proximity effects of deep trench viasINTEL CORP·Filed 2025·Application pending·0 cites
- 0665US2025112120A1Integrated circuit structure with deep via bar width tuningINTEL CORP·Filed 2023·Application pending·0 cites
- 0761US2025098249A1Mitigating proximity effects of deep trench viasINTEL CORP·Filed 2023·Application pending·0 cites
- 0860US2024290835A1Nanoribbon-based transistors with etch stop layer to assist subfin removalINTEL CORP·Filed 2023·Application pending·0 cites
- 0960US2025311273A1Zero diffusion break for improving transistor densityINTEL CORP·Filed 2024·Application pending·0 cites
- 1059US10658363B2Cut inside replacement metal gate trench to mitigate N-P proximity effectGLOBALFOUNDRIES INC·Filed 2019·Granted May 19, 2020·0 cites·15 claims
- 1159US2025301708A1Forksheet transistors with self-aligned dielectric spineINTEL CORP·Filed 2024·Application pending·0 cites
- 1258US2025391774A1Contact over active gate structures with gate recess for gate insulating cap layers for advanced integrated circuit structure fabricationINTEL CORP·Filed 2024·Application pending·0 cites
- 1358US2025308982A1Self-aligned patterned trench isolations for yield and performance improvementsINTEL CORP·Filed 2024·Application pending·0 cites
- 1458US2025386580A1Integrated circuit structures with backside isolation structureINTEL CORP·Filed 2024·Application pending·0 cites
- 1558US2025386578A1Contact over active gate structures with widened and lower capacitance insulating cap layers for advanced integrated circuit structure fabricationINTEL CORP·Filed 2024·Application pending·0 cites
- 1657US2025311272A1Gate-all-around devices with modulated number of active nanoribbonsINTEL CORP·Filed 2024·Application pending·0 cites
- 1757US2025311428A1Ribbon complementary fet (cfet) metal gate multi-voltage threshold integrationINTEL CORP·Filed 2024·Application pending·0 cites
- 1857US2025311427A1Deep via backside (dvb) partial recess for capacitance reduction in complementary fet (cfet) transistorsINTEL CORP·Filed 2024·Application pending·0 cites
- 1956US2025311353A1Dielectric wall used to separate gate dielectric between adjacent devicesINTEL CORP·Filed 2024·Application pending·0 cites
- 2056US2025311404A1Backside-patterned fin isolation structures between semiconductor devicesINTEL CORP·Filed 2024·Application pending·0 cites
- 2156US2025393250A1Integrated circuit structures having hybrid channel layoutINTEL CORP·Filed 2024·Application pending·0 cites
- 2255US12405691B2Systems and methods to mitigate false touchpad button eventsDELL PRODUCTS LP·Filed 2023·Granted Sep 2, 2025·0 cites·20 claims
- 2355US2025311363A1Backside gate cut formationINTEL CORP·Filed 2024·Application pending·0 cites
- 2455US2025194211A1Conductive via with front-side and back-side connections with a source or drain regionINTEL CORP·Filed 2023·Application pending·0 cites
- 2555US2025142948A1Integrated circuit devices with self-aligned via-to-jumper connectionsINTEL CORP·Filed 2023·Application pending·0 cites
- 2654US12339790B2Dynamic input/output support for portable information handling systemsDELL PRODUCTS LP·Filed 2023·Granted Jun 24, 2025·0 cites·20 claims
- 2754US10446550B2Cut inside replacement metal gate trench to mitigate N-P proximity effectGLOBALFOUNDRIES INC·Filed 2017·Granted Oct 15, 2019·0 cites·17 claims
- 2854US2025212463A1Metal-all-around contact structure coupled with a source or drain regionINTEL CORP·Filed 2023·Application pending·0 cites
- 2954US2025204000A1Integrated circuit device with co-metalized electrical contactINTEL CORP·Filed 2023·Application pending·0 cites
- 3054US2025107212A1Airgap spacer between gate electrode and source or drain contactINTEL CORP·Filed 2023·Application pending·0 cites
- 3154US2025176255A1Back-side nanoribbon removalINTEL CORP·Filed 2023·Application pending·0 cites
- 3254US2025212470A1Integrated circuit device with backside isolaton regionINTEL CORP·Filed 2023·Application pending·0 cites
- 3354US2025204035A1Integrated circuit device with dielectric cut at n-p boundaryINTEL CORP·Filed 2023·Application pending·0 cites
- 3454US2025098260A1Integrated circuit structures with patch spacersINTEL CORP·Filed 2023·Application pending·0 cites
- 3554US2025113559A1Trench contact structure with etch-stop layerINTEL CORP·Filed 2023·Application pending·0 cites
- 3654US2025096114A1Via structure with improved substrate groundingINTEL CORP·Filed 2023·Application pending·0 cites
- 3754US2025089310A1Through-gate structure with an airgap spacer in a semiconductor deviceINTEL CORP·Filed 2023·Application pending·0 cites
- 3853US11404415B2Stacked-gate transistorsGLOBALFOUNDRIES US INC·Filed 2019·Granted Aug 2, 2022·0 cites·19 claims
- 3953US2025194179A1Integrated circuit structures with backside contacts and asymmetric source and drain regionsCHU TAO·Filed 2023·Application pending·0 cites
- 4053US2025113547A1Integrated circuit structures with internal spacers for 2d channel materialsINTEL CORP·Filed 2023·Application pending·0 cites
- 4153US2025169130A1Integrated circuit structures with different nanoribbon thicknessesINTEL CORP·Filed 2023·Application pending·0 cites
- 4253US2025113586A1Nbti reduction and reliability improvement for selective layoutsINTEL CORP·Filed 2023·Application pending·0 cites
- 4353US2025087530A1Lateral etching process to remove metal gate foot structuresINTEL CORP·Filed 2023·Application pending·0 cites
- 4453US2025140649A1Integrated circuit devices with backside semiconductor structuresINTEL CORP·Filed 2023·Application pending·0 cites
- 4552US2025378231A1Weighted thermal sensor clustering system and methodDELL PRODUCTS LP·Filed 2024·Application pending·0 cites
- 4652US2025113595A1Multiple voltage threshold integrated circuit structure with local layout effect tuningINTEL CORP·Filed 2023·Application pending·0 cites
- 4752US2025107156A1Dielectric isolation between epitaxial regions and subfin regionsINTEL CORP·Filed 2023·Application pending·0 cites
- 4852US2025107175A1Integrated circuit structures having reduced local layout effectsINTEL CORP·Filed 2023·Application pending·0 cites
- 4951US2024222484A1Transistor with channel material in a stack with insulator material supportsINTEL CORP·Filed 2022·Application pending·0 cites
- 5051US2025194070A1Integrated circuit structures with transistor gate-channel arrangements for static random-access memoryCHU TAO·Filed 2023·Application pending·0 cites
Showing the top 50 of 75 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →