Inventor · disambiguated record
Taewoo Kang
Also filed as: KANG TAEWOO
22 granted patents·4 pending applications·129 citations·filing 2006–2024
94Inventor score
Files withSTATS CHIPPAC LTD9PENDSE RAJENDRA D5SAMSUNG ELECTRONICS CO LTD3CHO SUNGWON2CHOI HAENGCHEOL2
Top patents by PatentIndex Score
26 records- 0194US8178392B2Electronic system with expansion featureCHOI HAENGCHEOL·Filed 2007·Granted May 15, 2012·45 cites·20 claims
- 0294US8129841B2Solder joint flip chip interconnectionPENDSE RAJENDRA D·Filed 2009·Granted Mar 6, 2012·29 cites·25 claims
- 0389US8810029B2Solder joint flip chip interconnectionPENDSE RAJENDRA D·Filed 2012·Granted Aug 19, 2014·8 cites·49 claims
- 0484US9773685B2Solder joint flip chip interconnection having relief structurePENDSE RAJENDRA D·Filed 2012·Granted Sep 26, 2017·6 cites·24 claims
- 0577USRE44562ESolder joint flip chip interconnection having relief structurePENDSE RAJENDRA D·Filed 2012·Granted Oct 29, 2013·3 cites·27 claims
- 0677US7615865B2Standoff height improvement for bumping technology using solder resistSTATS CHIPPAC LTD·Filed 2007·Granted Nov 10, 2009·8 cites·21 claims
- 0776US8173536B2Semiconductor device and method of forming column interconnect structure to reduce wafer stressCHO SUNGWON·Filed 2009·Granted May 8, 2012·6 cites·27 claims
- 0874USRE44608ESolder joint flip chip interconnectionSTATS CHIPPAC LTD·Filed 2013·Granted Nov 26, 2013·3 cites·25 claims
- 0972US7951643B2Integrated circuit packaging system with lead frame and method of manufacture thereofSTATS CHIPPAC LTD·Filed 2008·Granted May 31, 2011·4 cites·20 claims
- 1070US10651074B2Substrate processing apparatus and method of manufacture using the sameSAMSUNG ELECTRONICS CO LTD·Filed 2017·Granted May 12, 2020·1 cites·20 claims
- 1170US8779570B2Stackable integrated circuit package systemSHIM SEONG BO·Filed 2008·Granted Jul 15, 2014·5 cites·20 claims
- 1269US8211746B2Integrated circuit packaging system with lead frame and method of manufacture thereofHA JONG-WOO·Filed 2011·Granted Jul 3, 2012·2 cites·20 claims
- 1368US8216930B2Solder joint flip chip interconnection having relief structurePENDSE RAJENDRA D·Filed 2009·Granted Jul 10, 2012·3 cites·36 claims
- 1467US8018052B2Integrated circuit package system with side substrate having a top layerSTATS CHIPPAC LTD·Filed 2007·Granted Sep 13, 2011·4 cites·20 claims
- 1564US2025157107A1Device and method for extracting information in design drawingHYUNDAI MOTOR CO LTD·Filed 2024·Application pending·0 cites
- 1663US2025391186A1Vehicle mileage recognition method and apparatusHYUNDAI MOTOR CO LTD·Filed 2024·Application pending·0 cites
- 1761US8703541B2Electronic system with expansion featureCHOI HAENGCHEOL·Filed 2012·Granted Apr 22, 2014·1 cites·20 claims
- 1857US9373573B2Solder joint flip chip interconnectionSTATS CHIPPAC LTD·Filed 2014·Granted Jun 21, 2016·0 cites·24 claims
- 1957US7875495B2Standoff height improvement for bumping technology using solder resistSTATS CHIPPAC LTD·Filed 2009·Granted Jan 25, 2011·1 cites·21 claims
- 2054USRE44761ESolder joint flip chip interconnection having relief structureSTATS CHIPPAC LTD·Filed 2013·Granted Feb 11, 2014·0 cites·36 claims
- 2151US8901734B2Semiconductor device and method of forming column interconnect structure to reduce wafer stressCHO SUNGWON·Filed 2012·Granted Dec 2, 2014·0 cites·19 claims
- 2251US7659633B2Solder joint flip chip interconnection having relief structureSTATS CHIPPAC LTD·Filed 2006·Granted Feb 9, 2010·0 cites·27 claims
- 2350US11715697B2Semiconductor packages including at least one supporting portionSAMSUNG ELECTRONICS CO LTD·Filed 2020·Granted Aug 1, 2023·0 cites·19 claims
- 2448US2007105277A1Solder joint flip chip interconnectionSTATS CHIPPAC LTD·Filed 2006·Application pending·0 cites
- 2544US9922897B1Method of manufacturing semiconductor packageKIM KYOUNG HWAN·Filed 2017·Granted Mar 20, 2018·0 cites·20 claims
- 2641US2014061890A1Semiconductor package and method of manufacturing the sameSAMSUNG ELECTRONICS CO LTD·Filed 2013·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →