Solder joint flip chip interconnection having relief structure

Abstract

A flip chip interconnect has a tapering interconnect structure, and the area of contact of the interconnect structure with the site on the substrate metallization is less than the area of contact of the interconnect structure with the die pad. A solder mask has an opening over the interconnect site, and the solder mask makes contact with the interconnect structure, or is in close proximity to the interconnect structure, at the margin of the opening. The flip chip interconnect is provided with an underfill. During the underfill process, the contact (or near proximity) of the solder mask with the interconnect structure interferes with flow of the underfill material toward the substrate adjacent the site, resulting in formation of a void left unfilled by the underfill, adjacent the contact of the interconnect structure with the site on the substrate metallization. The void can help provide relief from strain induced by changes in temperature of the system.

What is claimed is: 
     
       1. A method for forming flip chip interconnection, comprising:
 providing a substrate having an interconnect site on a conductive trace formed on a die attach surface; 
 providing a semiconductor die having an interconnect pad formed on an active surface; 
 depositing fusible conductive material on the interconnect pad or on the interconnect site; 
 positioning the semiconductor die with the active side of the die oriented toward the die attach surface of the substrate, the fusible conductive material contacting the interconnect pad and interconnect site; and 
 melting and then re-solidifying the fusible conductive material to form a metallurgical interconnection between the interconnect pad and interconnect site, wherein a width of the metallurgical interconnect across the interconnect site is less than a length of the metallurgical interconnect along the interconnect site and a width of the metallurgical interconnect across the interconnect pad is about 1.5 to 4 times the width of the metallurgical interconnect across the interconnect site. 
 
     
     
       2. The method of  claim 1 , further including forming a first insulating layer over the substrate with an opening over the interconnect site. 
     
     
       3. The method of  claim 2 , wherein the metallurgical interconnect contacts the first insulating layer while leaving a void between the first insulating layer and interconnect site. 
     
     
       4. The method of  claim 1 , further including forming a composite interconnect structure between the interconnect pad and interconnect site. 
     
     
       5. The method of  claim 4 , wherein the composite interconnect structure includes a non-collapsible portion and collapsible portion. 
     
     
       6. The method of  claim 5 , wherein the non-collapsible portion includes lead-tin alloy, copper, gold, or nickel. 
     
     
       7. The method of  claim 5 , wherein the collapsible portion includes eutectic solder. 
     
     
       8. A method for forming flip chip interconnection, comprising:
 providing a substrate having an interconnect site formed on a die attach surface; 
 forming a first insulating layer over the substrate with an opening over the interconnect site; 
 providing a semiconductor die having an interconnect pad formed on an active surface; 
 depositing bump material on the interconnect pad or on the interconnect site; 
 positioning the semiconductor die with the active side of the die oriented toward the die attach surface of the substrate, the bump material contacting the interconnect pad and interconnect site; and 
 reflowing the bump material to form a composite bump between the interconnect pad and interconnect site, the composite bump including a non-collapsible portion and collapsible portion, wherein a width of the composite bump across the interconnect site is less than a length of the composite bump along the interconnect site and the composite bump contacts the first insulating layer while leaving a void between the first insulating layer and interconnect site. 
 
     
     
       9. The method of  claim 8 , wherein a width of the composite bump across the interconnect pad is about 1.5 to 4 times the width of the composite bump across the interconnect site. 
     
     
       10. The method of  claim 8 , wherein the non-collapsible portion includes lead-tin alloy, copper, gold, or nickel. 
     
     
       11. The method of  claim 8 , wherein the collapsible portion includes eutectic solder. 
     
     
       12. A method for forming flip chip interconnection, comprising:
 providing a substrate having an interconnect site; 
 forming a first insulating layer over the substrate with an opening over the interconnect site; 
 providing a semiconductor die having an interconnect pad; 
 depositing bump material between the interconnect pad and interconnect site; and 
 reflowing the bump material to form a bump between the interconnect pad and interconnect site, wherein a width of the bump across the interconnect pad is about 1.5 to 4 times the width of the bump across the interconnect site and the width of the bump across the interconnect site is less than a length of the bump along the interconnect site and the bump contacts the first insulating layer while leaving a void between the first insulating layer and interconnect site. 
 
     
     
       13. The method of  claim 12 , wherein the bump includes a composite bump between the interconnect pad and interconnect site. 
     
     
       14. The method of  claim 13 , wherein the composite bump includes a non-collapsible portion and collapsible portion. 
     
     
       15. The method of  claim 14 , wherein the non-collapsible portion includes lead-tin alloy, copper, gold, or nickel. 
     
     
       16. The method of  claim 14 , wherein the collapsible portion includes eutectic solder. 
     
     
       17. A method for forming flip chip interconnection, comprising:
 providing a substrate having an interconnect site; 
 providing a semiconductor die having an interconnect pad; 
 depositing bump material between the interconnect pad and interconnect site; and 
 reflowing the bump material to form a bump between the interconnect pad and interconnect site, wherein a width of the bump across the interconnect site is less than a length of the bump along the interconnect site and the width of the bump across the interconnect pad is about 1.5 to 4 times the width of the bump across the interconnect site. 
 
     
     
       18. The method of  claim 17 , further including forming a first insulating layer over the substrate with an opening over the interconnect site. 
     
     
       19. The method of  claim 18 , wherein the bump contacts the first insulating layer while leaving a void between the first insulating layer and interconnect site. 
     
     
       20. A method for forming flip chip interconnection, comprising:
 providing a substrate having an interconnect site; 
 providing a semiconductor die having an interconnect pad; 
 depositing bump material between the interconnect pad and interconnect site; and 
 reflowing the bump material to form a composite bump between the interconnect pad and interconnect site, wherein a width of the composite bump across the interconnect site is less than a length of the composite bump along the interconnect site and the composite bump includes a non-collapsible portion and collapsible portion. 
 
     
     
       21. A method for forming flip chip interconnection, comprising:
 providing a substrate having an interconnect site formed on a die attach surface; 
 forming a first insulating layer over the substrate with an opening over the interconnect site; 
 providing a semiconductor die having an interconnect pad formed on an active surface; 
 depositing bump material on the interconnect pad or on the interconnect site; 
 positioning the semiconductor die with the active side of the die oriented toward the die attach surface of the substrate, the bump material contacting the interconnect pad and interconnect site; and 
 reflowing the bump material to form a bump between the interconnect pad and interconnect site, wherein a contact area of the bump across the interconnect site in a first direction is less than a contact area of the bump along the interconnect site in a second direction perpendicular to the first direction and the contact area of the bump in the second direction contacts the first insulating layer while leaving a void along the contact area of the bump in the second direction between the first insulating layer and interconnect site. 
 
     
     
       22. The method of  claim 21 , wherein a width of the bump across the interconnect pad is about 1.5 to 4 times the width of the bump across the interconnect site. 
     
     
       23. The method of  claim 21 , wherein the bump includes a composite bump between the interconnect pad and interconnect site. 
     
     
       24. The method of  claim 23 , wherein the composite bump includes a non-collapsible portion and collapsible portion. 
     
     
       25. The method of  claim 24 , wherein the non-collapsible portion includes lead-tin alloy, copper, gold, or nickel. 
     
     
       26. The method of  claim 24 , wherein the collapsible portion includes eutectic solder. 
     
     
       27. A method for forming flip chip interconnection, comprising:
 providing a substrate having an interconnect site; 
 forming a first insulating layer over the substrate with an opening over the interconnect site; 
 providing a semiconductor die having an interconnect pad; 
 forming a bump between the interconnect pad and interconnect site, wherein a contact area of the bump across the interconnect site in a first direction is less than a contact area of the bump along the interconnect site in a second direction perpendicular to the first direction and the contact area of the bump in the second direction contacts the first insulating layer while leaving a void along the contact area of the bump in the second direction between the first insulating layer and interconnect site. 
 
     
     
       28. The method of  claim 27 , wherein a width of the bump across the interconnect pad is about 1.5 to 4 times the width of the bump across the interconnect site. 
     
     
       29. The method of  claim 27 , wherein the bump includes a composite bump between the interconnect pad and interconnect site. 
     
     
       30. The method of  claim 29 , wherein the composite bump includes a non-collapsible portion and collapsible portion. 
     
     
       31. The method of  claim 30 , wherein the non-collapsible portion includes lead-tin alloy, copper, gold, or nickel. 
     
     
       32. The method of  claim 30 , wherein the collapsible portion includes eutectic solder. 
     
     
       33. A method for forming flip chip interconnection, comprising: providing a substrate having an interconnect site; providing a semiconductor die having an interconnect pad; and forming a bump between the interconnect pad and interconnect site, wherein a contact area of the bump across the interconnect site in a first direction is less than a contact area of the bump along the interconnect site in a second direction perpendicular to the first direction, wherein the bump includes a composite bump between the interconnect pad and interconnect site, and wherein the composite bump includes a non-collapsible portion and collapsible portion. 
     
     
       34. The method of  claim 33 , further including forming a first insulating layer over the substrate with an opening over the interconnect site. 
     
     
       35. The method of  claim 34 , wherein the bump contacts the first insulating layer while leaving a void between the first insulating layer and interconnect site. 
     
     
       36. The method of  claim 33 , wherein a width of the bump across the interconnect pad is about 1.5 to 4 times the width of the bump across the interconnect site.