Inventor · disambiguated record
Terry Lines
Also filed as: LINES TERRY · LINES TERRY L · LINES TERRY LEE
10 granted patents·1 pending application·91 citations·filing 2001–2010
88Inventor score
Files withNAT SEMICONDUCTOR CORP11
Top patents by PatentIndex Score
11 records- 0194US7410879B1System and method for providing a dual via architecture for thin film resistorsNAT SEMICONDUCTOR CORP·Filed 2005·Granted Aug 12, 2008·34 cites·20 claims
- 0289US7332403B1System and method for providing a buried thin film resistor having end caps defined by a dielectric maskNAT SEMICONDUCTOR CORP·Filed 2005·Granted Feb 19, 2008·17 cites·20 claims
- 0381US7829428B1Method for eliminating a mask layer during thin film resistor manufacturingNAT SEMICONDUCTOR CORP·Filed 2008·Granted Nov 9, 2010·9 cites·20 claims
- 0473US7808048B1System and method for providing a buried thin film resistor having end caps defined by a dielectric maskNAT SEMICONDUCTOR CORP·Filed 2007·Granted Oct 5, 2010·5 cites·20 claims
- 0571US6703670B1Depletion-mode transistor that eliminates the need to separately set the threshold voltage of the depletion-mode transistorNAT SEMICONDUCTOR CORP·Filed 2001·Granted Mar 9, 2004·15 cites·6 claims
- 0657US7144795B1Method for forming a depletion-mode transistor that eliminates the need to separately set the threshold voltage of the depletion-mode transistorNAT SEMICONDUCTOR CORP·Filed 2003·Granted Dec 5, 2006·6 cites·20 claims
- 0751US7960240B1System and method for providing a dual via architecture for thin film resistorsNAT SEMICONDUCTOR CORP·Filed 2008·Granted Jun 14, 2011·0 cites·20 claims
- 0851US7172973B1System and method for selectively modifying a wet etch rate in a large areaNAT SEMICONDUCTOR CORP·Filed 2004·Granted Feb 6, 2007·3 cites·21 claims
- 0949US7867871B1System and method for increasing breakdown voltage of LOCOS isolated devicesNAT SEMICONDUCTOR CORP·Filed 2006·Granted Jan 11, 2011·0 cites·20 claims
- 1045US7161216B1Depletion-mode transistor that eliminates the need to separately set the threshold voltage of the depletion-mode transistorNAT SEMICONDUCTOR CORP·Filed 2003·Granted Jan 9, 2007·2 cites·16 claims
- 1145US2011065256A1System and method for increasing breakdown voltage of locos isolated devicesNAT SEMICONDUCTOR CORP·Filed 2010·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Terry Lines files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →