Inventor · disambiguated record
Thomas A. Kocian
Also filed as: KOCIAN THOMAS A · KOCIAN THOMAS ALLAN
26 granted patents·2 pending applications·200 citations·filing 1995–2018
95Inventor score
Top patents by PatentIndex Score
28 records- 0190US6762868B2Electro-optical package with drop-in apertureTEXAS INSTRUMENTS INC·Filed 2001·Granted Jul 13, 2004·61 cites·29 claims
- 0289US8736045B1Integrated bondline spacers for wafer level packaged circuit devicesRAYTHEON CO·Filed 2012·Granted May 27, 2014·8 cites·6 claims
- 0387US8608894B2Wafer level packaged focal plane arrayBLACK STEPHEN H·Filed 2011·Granted Dec 17, 2013·5 cites·18 claims
- 0485US8809784B2Incident radiation detector packagingGOOCH ROLAND W·Filed 2011·Granted Aug 19, 2014·11 cites·20 claims
- 0584US7466018B2MEMS device wafer-level packageTEXAS INSTRUMENTS INC·Filed 2007·Granted Dec 16, 2008·9 cites·8 claims
- 0683US7226810B2MEMS device wafer-level packageTEXAS INSTRUMENTS INC·Filed 2005·Granted Jun 5, 2007·9 cites·9 claims
- 0782US9093444B2Wafer level package solder barrier used as vacuum getterRAYTHEON CO·Filed 2013·Granted Jul 28, 2015·4 cites·6 claims
- 0879US5550398AHermetic packaging with opticalTEXAS INSTRUMENTS INC·Filed 1995·Granted Aug 27, 1996·74 cites·10 claims
- 0978US9427776B2Method of stress relief in anti-reflective coated cap wafers for wafer level packaged infrared focal plane arraysRAYTHEON CO·Filed 2012·Granted Aug 30, 2016·1 cites·11 claims
- 1076US8844793B2Reducing formation of oxide on solderDIEP BUU·Filed 2011·Granted Sep 30, 2014·4 cites·20 claims
- 1175US9969610B2Wafer level MEMS package including dual seal ringRAYTHEON CO·Filed 2017·Granted May 15, 2018·1 cites·12 claims
- 1273US9334154B2Hermetically sealed package having stress reducing layerRAYTHEON CO·Filed 2014·Granted May 10, 2016·2 cites·22 claims
- 1371US9132496B2Reducing formation of oxide on solderRAYTHEON CO·Filed 2014·Granted Sep 15, 2015·2 cites·20 claims
- 1470US9227839B2Wafer level packaged infrared (IR) focal plane array (FPA) with evanescent wave couplingRAYTHEON CO·Filed 2014·Granted Jan 5, 2016·2 cites·14 claims
- 1566US9022584B2Protecting an optical surfaceBLACK STEPHEN H·Filed 2011·Granted May 5, 2015·2 cites·20 claims
- 1659US10262913B2Wafer level package solder barrier used as vacuum getterRAYTHEON CO·Filed 2018·Granted Apr 16, 2019·0 cites·8 claims
- 1758US9174836B2Integrated bondline spacers for wafer level packaged circuit devicesRAYTHEON CO·Filed 2014·Granted Nov 3, 2015·0 cites·23 claims
- 1857US9187312B2Integrated bondline spacers for wafer level packaged circuit devicesRAYTHEON CO·Filed 2014·Granted Nov 17, 2015·0 cites·15 claims
- 1956US10315918B2Method of stress relief in anti-reflective coated cap wafers for wafer level packaged infrared focal plane arraysRAYTHEON CO·Filed 2016·Granted Jun 11, 2019·0 cites·18 claims
- 2056US9966320B2Wafer level package solder barrier used as vacuum getterRAYTHEON CO·Filed 2016·Granted May 8, 2018·0 cites·5 claims
- 2156US9196556B2Getter structure and method for forming such structureRAYTHEON CO·Filed 2014·Granted Nov 24, 2015·0 cites·6 claims
- 2256US6908791B2MEMS device wafer-level packageTEXAS INSTRUMENTS INC·Filed 2002·Granted Jun 21, 2005·5 cites·30 claims
- 2353US9520332B2Wafer level package solder barrier used as vacuum getterRAYTHEON CO·Filed 2015·Granted Dec 13, 2016·0 cites·4 claims
- 2452US9708181B2Hermetically sealed package having stress reducing layerRAYTHEON CO·Filed 2016·Granted Jul 18, 2017·0 cites·4 claims
- 2550US9771258B2Wafer level MEMS package including dual seal ringRAYTHEON CO·Filed 2015·Granted Sep 26, 2017·0 cites·4 claims
- 2646US9105800B2Method of forming deposited patterns on a surfaceRAYTHEON CO·Filed 2013·Granted Aug 11, 2015·0 cites·3 claims
- 2746US2016040282A1Getter structure and method for forming such structureRAYTHEON CO·Filed 2015·Application pending·0 cites
- 2842US2014175590A1Getter structure for wafer level vacuum packaged deviceRAYTHEON CO·Filed 2012·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →