Inventor · disambiguated record
Toni D. Van Gompel
Also filed as: VAN GOMPEL TONI D
8 granted patents·6 pending applications·65 citations·filing 2003–2014
85Inventor score
Top patents by PatentIndex Score
14 records- 0185US7528078B2Process of forming electronic device including a densified nitride layer adjacent to an opening within a semiconductor layerFREESCALE SEMICONDUCTOR INC·Filed 2006·Granted May 5, 2009·11 cites·20 claims
- 0282US7670895B2Process of forming an electronic device including a semiconductor layer and another layer adjacent to an opening within the semiconductor layerFREESCALE SEMICONDUCTOR INC·Filed 2006·Granted Mar 2, 2010·13 cites·20 claims
- 0377US6979627B2Isolation trenchFREESCALE SEMICONDUCTOR INC·Filed 2004·Granted Dec 27, 2005·27 cites·24 claims
- 0474US7491622B2Process of forming an electronic device including a layer formed using an inductively coupled plasmaFREESCALE SEMICONDUCTOR INC·Filed 2006·Granted Feb 17, 2009·5 cites·19 claims
- 0570US8766362B2Shallow trench isolation for SOI structures combining sidewall spacer and bottom linerLOIKO KONSTANTIN V·Filed 2012·Granted Jul 1, 2014·2 cites·19 claims
- 0668US8236638B2Shallow trench isolation for SOI structures combining sidewall spacer and bottom linerLOIKO KONSTANTIN V·Filed 2007·Granted Aug 7, 2012·3 cites·23 claims
- 0751US2014299935A1Shallow trench isolation for soi structures combining sidewall spacer and bottom linerLOIKO KONSTANTIN V·Filed 2014·Application pending·0 cites
- 0850US7037857B2Method for elimination of excessive field oxide recess for thin Si SOIFREESCALE SEMICONDUCTOR INC·Filed 2003·Granted May 2, 2006·4 cites·19 claims
- 0941US7687370B2Method of forming a semiconductor isolation trenchFREESCALE SEMICONDUCTOR INC·Filed 2006·Granted Mar 30, 2010·0 cites·10 claims
- 1041US2007224772A1Method for forming a stressor structureFREESCALE SEMICONDUCTOR INC·Filed 2006·Application pending·0 cites
- 1141US2007249129A1STI stressor integration for minimal phosphoric exposure and divot-free topographyFREESCALE SEMICONDUCTOR INC·Filed 2006·Application pending·0 cites
- 1239US2007249127A1Electronic device including a semiconductor layer and a sidewall spacer and a process of forming the sameFREESCALE SEMICONDUCTOR INC·Filed 2006·Application pending·0 cites
- 1339US2006261436A1Electronic device including a trench field isolation region and a process for forming the sameFREESCALE SEMICONDUCTOR INC·Filed 2005·Application pending·0 cites
- 1434US2006234467A1Method of forming trench isolation in a semiconductor deviceVAN GOMPEL TONI D·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →