Inventor · disambiguated record
Vadim Gouterman
Also filed as: GOUTERMAN VADIM
14 granted patents·80 citations·filing 2002–2020
92Inventor score
Top patents by PatentIndex Score
14 records- 0189US8095906B2Method and apparatus for performing parallel routing using a multi-threaded routing procedureBETZ VAUGHN·Filed 2008·Granted Jan 10, 2012·14 cites·36 claims
- 0286US7412680B1Method and apparatus for performing integrated global routing and buffer insertionALTERA CORP·Filed 2005·Granted Aug 12, 2008·16 cites·21 claims
- 0385US8296709B2Method and apparatus for performing parallel routing using a multi-threaded routing procedureBETZ VAUGHN·Filed 2011·Granted Oct 23, 2012·5 cites·23 claims
- 0484US11755810B2Method and apparatus for performing parallel routing using a multi-threaded routing procedureALTERA CORP·Filed 2020·Granted Sep 12, 2023·1 cites·20 claims
- 0583US8533652B2Method and apparatus for performing parallel routing using a multi-threaded routing procedureBETZ VAUGHN·Filed 2012·Granted Sep 10, 2013·4 cites·25 claims
- 0681US8898609B1Method and apparatus for integrating signal transition time modeling during routingGOUTERMAN VADIM·Filed 2006·Granted Nov 25, 2014·15 cites·34 claims
- 0779US9536034B2Method and apparatus for performing parallel routing using a multi-threaded routing procedureALTERA CORP·Filed 2014·Granted Jan 3, 2017·2 cites·23 claims
- 0878US8935650B2Method and apparatus for performing parallel routing using a multi-threaded routing procedureALTERA CORP·Filed 2014·Granted Jan 13, 2015·2 cites·20 claims
- 0978US8739105B2Method and apparatus for performing parallel routing using a multi-threaded routing procedureALTERA CORP·Filed 2013·Granted May 27, 2014·2 cites·27 claims
- 1074US10520580B2Method and system of determining an estimated position of a target electronically tagged objectHAYSTACK MAGIC INC·Filed 2018·Granted Dec 31, 2019·4 cites·13 claims
- 1168US10783310B2Method and apparatus for performing parallel routing using a multi-threaded routing procedureALTERA CORP·Filed 2018·Granted Sep 22, 2020·0 cites·21 claims
- 1265US7441208B1Methods for designing integrated circuitsALTERA CORP·Filed 2005·Granted Oct 21, 2008·3 cites·18 claims
- 1363US10140411B2Method and apparatus for performing parallel routing using a multi-threaded routing procedureALTERA CORP·Filed 2016·Granted Nov 27, 2018·0 cites·24 claims
- 1459US6915493B2Method and apparatus for providing feedback from a compactor to a router to facilitate layout of an integrated circuitSYNOPSYS INC·Filed 2002·Granted Jul 5, 2005·12 cites·16 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →