Inventor · disambiguated record
Vianney Choserot
Also filed as: CHOSEROT VIANNEY · CHOSEROT VIANNEY ANTOINE
8 granted patents·1 pending application·14 citations·filing 2006–2022
80Inventor score
Files withADVANCED RISC MACH LTD3CHOSEROT VIANNEY2INTEL IP CORP2INFINEON TECHNOLOGIES AG1INTEL MOBILE COMM GMBH1
Top patents by PatentIndex Score
9 records- 0183US12300338B2Configurable scan chain architecture for multi-port memoryADVANCED RISC MACH LTD·Filed 2022·Granted May 13, 2025·1 cites·20 claims
- 0269US10878893B1Control architecture for column decoder circuitryADVANCED RISC MACH LTD·Filed 2019·Granted Dec 29, 2020·2 cites·23 claims
- 0363US9236144B2For-test apparatuses and techniquesINTEL IP CORP·Filed 2014·Granted Jan 12, 2016·3 cites·23 claims
- 0461US8143694B2Fuse deviceCHOSEROT VIANNEY·Filed 2008·Granted Mar 27, 2012·3 cites·16 claims
- 0558US8897054B2ROM device with keepersINTEL MOBILE COMM GMBH·Filed 2013·Granted Nov 25, 2014·3 cites·25 claims
- 0654US12300310B2Multi-port bitcell architectureADVANCED RISC MACH LTD·Filed 2022·Granted May 13, 2025·0 cites·20 claims
- 0748US7403432B2Differential read-out circuit for fuse memory cellsINFINEON TECHNOLOGIES AG·Filed 2006·Granted Jul 22, 2008·2 cites·18 claims
- 0840US2012146710A1Fuse DeviceCHOSEROT VIANNEY·Filed 2012·Application pending·0 cites
- 0938US9595316B2Design-for-test apparatuses and techniquesINTEL IP CORP·Filed 2015·Granted Mar 14, 2017·0 cites·26 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →