Inventor · disambiguated record
Vivek K. De
Also filed as: DE VIVEK · DE VIVEK K
245 granted patents·26 pending applications·5,751 citations·filing 1997–2021
99Inventor score
Top patents by PatentIndex Score
271 records- 0199US7199617B1Level shifterINTEL CORP·Filed 2005·Granted Apr 3, 2007·98 cites·23 claims
- 0299US6218895B1Multiple well transistor circuits having forward body biasINTEL CORP·Filed 1998·Granted Apr 17, 2001·293 cites·19 claims
- 0398US7230846B2Purge-based floating body memoryINTEL CORP·Filed 2005·Granted Jun 12, 2007·118 cites·21 claims
- 0498US7015741B2Adaptive body bias for clock skew compensationINTEL CORP·Filed 2003·Granted Mar 21, 2006·134 cites·23 claims
- 0598US6917237B1Temperature dependent regulation of threshold voltageINTEL CORP·Filed 2004·Granted Jul 12, 2005·158 cites·30 claims
- 0698US6903984B1Floating-body DRAM using write word line for increased retention timeINTEL CORP·Filed 2003·Granted Jun 7, 2005·138 cites·30 claims
- 0798US6721222B2Noise suppression for open bit line DRAM architecturesINTEL CORP·Filed 2002·Granted Apr 13, 2004·169 cites·7 claims
- 0898US6359802B1One-transistor and one-capacitor DRAM cell for logic process technologyINTEL CORP·Filed 2000·Granted Mar 19, 2002·187 cites·17 claims
- 0998US6218892B1Differential circuits employing forward body biasINTEL CORP·Filed 1999·Granted Apr 17, 2001·249 cites·30 claims
- 1097US7061806B2Floating-body memory cell writeINTEL CORP·Filed 2004·Granted Jun 13, 2006·151 cites·12 claims
- 1197US6421269B1Low-leakage MOS planar capacitors for use within DRAM storage cellsINTEL CORP·Filed 2000·Granted Jul 16, 2002·147 cites·38 claims
- 1296US8288846B2Power management integrated circuitNARENDRA SIVA G·Filed 2010·Granted Oct 16, 2012·23 cites·22 claims
- 1396US7167397B2Apparatus and method for programming a memory arrayINTEL CORP·Filed 2005·Granted Jan 23, 2007·50 cites·15 claims
- 1496US6724648B2SRAM array with dynamic voltage for reducing active leakage powerINTEL CORP·Filed 2002·Granted Apr 20, 2004·128 cites·35 claims
- 1595US6744301B1System using body-biased sleep transistors to reduce leakage power while minimizing performance penalties and noiseINTEL CORP·Filed 2000·Granted Jun 1, 2004·72 cites·17 claims
- 1695US6433624B1Threshold voltage generation circuitINTEL CORP·Filed 2000·Granted Aug 13, 2002·70 cites·28 claims
- 1795US6329874B1Method and apparatus for reducing standby leakage current using a leakage control transistor that receives boosted gate drive during an active modeINTEL CORP·Filed 1998·Granted Dec 11, 2001·132 cites·21 claims
- 1894US9299395B2Methods and systems to selectively boost an operating voltage of, and controls to an 8T bit-cell array and/or other logic blocksKULKARNI JAYDEEP P·Filed 2012·Granted Mar 29, 2016·18 cites·19 claims
- 1994US7558097B2Memory having bit line with resistor(s) between memory cellsINTEL CORP·Filed 2006·Granted Jul 7, 2009·33 cites·17 claims
- 2094US7403426B2Memory with dynamically adjustable supplyINTEL CORP·Filed 2005·Granted Jul 22, 2008·36 cites·12 claims
- 2194US7307899B2Reducing power consumption in integrated circuitsINTEL CORP·Filed 2005·Granted Dec 11, 2007·36 cites·5 claims
- 2294US7102951B2OTP antifuse cell and cell arrayINTEL CORP·Filed 2004·Granted Sep 5, 2006·86 cites·27 claims
- 2394US6784722B2Wide-range local bias generator for body bias gridINTEL CORP·Filed 2002·Granted Aug 31, 2004·58 cites·13 claims
- 2494US6593799B2Circuit including forward body bias from supply voltage and ground nodesINTEL CORP·Filed 2001·Granted Jul 15, 2003·88 cites·32 claims
- 2594US6169419B1Method and apparatus for reducing standby leakage current using a transistor stack effectINTEL CORP·Filed 1998·Granted Jan 2, 2001·90 cites·26 claims
- 2693US10845831B2Techniques in hybrid regulators of high power supply rejection ratio and conversion efficiencyINTEL CORP·Filed 2019·Granted Nov 24, 2020·11 cites·16 claims
- 2793US7859081B2Capacitor, method of increasing a capacitance area of same, and system containing sameINTEL CORP·Filed 2007·Granted Dec 28, 2010·25 cites·8 claims
- 2893US7315463B2Apparatus and method for multi-phase transformersINTEL CORP·Filed 2004·Granted Jan 1, 2008·44 cites·30 claims
- 2993US7280425B2Dual gate oxide one time programmable (OTP) antifuse cellINTEL CORP·Filed 2005·Granted Oct 9, 2007·32 cites·19 claims
- 3093US6608513B2Flip-flop circuit having dual-edge triggered pulse generatorINTEL CORP·Filed 2001·Granted Aug 19, 2003·50 cites·7 claims
- 3192US11444532B2Non-linear clamp strength tuning method and apparatusINTEL CORP·Filed 2019·Granted Sep 13, 2022·8 cites·22 claims
- 3292US10108212B2Digital low drop-out voltage controller including embedded dual-loop feedback for minimum energy point operationINTEL CORP·Filed 2015·Granted Oct 23, 2018·10 cites·19 claims
- 3392US8138042B2Capacitor, method of increasing a capacitance area of same, and system containing sameDOYLE BRIAN S·Filed 2010·Granted Mar 20, 2012·12 cites·12 claims
- 3492US6429726B1Robust forward body bias generation circuit with digital trimming for DC power supply variationINTEL CORP·Filed 2001·Granted Aug 6, 2002·59 cites·18 claims
- 3591US7504808B2Multiphase transformer for a multiphase DC-DC converterINTEL CORP·Filed 2005·Granted Mar 17, 2009·31 cites·27 claims
- 3691US7342845B2Method and apparatus to clamp SRAM supply voltageINTEL CORP·Filed 2005·Granted Mar 11, 2008·21 cites·21 claims
- 3791US7274250B2Low-voltage, buffered bandgap reference with selectable output voltageINTEL CORP·Filed 2005·Granted Sep 25, 2007·23 cites·15 claims
- 3890US7164307B2Bias generator for body biasINTEL CORP·Filed 2005·Granted Jan 16, 2007·22 cites·27 claims
- 3990US7020041B2Method and apparatus to clamp SRAM supply voltageINTEL CORP·Filed 2003·Granted Mar 28, 2006·43 cites·42 claims
- 4090US6519176B1Dual threshold SRAM cell for single-ended sensingINTEL CORP·Filed 2000·Granted Feb 11, 2003·57 cites·21 claims
- 4189US10069397B2Digitally controlled zero voltage switchingINTEL CORP·Filed 2015·Granted Sep 4, 2018·7 cites·19 claims
- 4289US8291168B2Disabling cache portions during low voltage operationsWILKERSON CHRISTOPHER·Filed 2011·Granted Oct 16, 2012·12 cites·20 claims
- 4389US7409631B2Error-detection flip-flopINTEL CORP·Filed 2005·Granted Aug 5, 2008·17 cites·9 claims
- 4489US7391640B22-transistor floating-body dramINTEL CORP·Filed 2004·Granted Jun 24, 2008·45 cites·43 claims
- 4589US7031203B2Floating-body DRAM using write word line for increased retention timeINTEL CORP·Filed 2005·Granted Apr 18, 2006·14 cites·22 claims
- 4688US6707708B1Static random access memory with symmetric leakage-compensated bit lineINTEL CORP·Filed 2002·Granted Mar 16, 2004·46 cites·8 claims
- 4788US6486706B2Domino logic with low-threshold NMOS pull-upINTEL CORP·Filed 2000·Granted Nov 26, 2002·36 cites·20 claims
- 4888US6484265B2Software control of transistor body bias in controlling chip parametersINTEL CORP·Filed 1998·Granted Nov 19, 2002·132 cites·24 claims
- 4988US6272666B1Transistor group mismatch detection and reductionINTEL CORP·Filed 1998·Granted Aug 7, 2001·66 cites·28 claims
- 5088US6100751AForward body biased field effect transistor providing decoupling capacitanceINTEL CORP·Filed 1998·Granted Aug 8, 2000·72 cites·21 claims
Showing the top 50 of 271 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →