Inventor · disambiguated record
Vinh Luong
Also filed as: LUONG VINH · LUONG VINH HOANG
9 granted patents·2 pending applications·65 citations·filing 2008–2018
85Inventor score
Top patents by PatentIndex Score
11 records- 0193US8389416B2Process for etching silicon with selectivity to silicon-germaniumLUONG VINH HOANG·Filed 2010·Granted Mar 5, 2013·35 cites·18 claims
- 0290US8334083B2Etch process for controlling pattern CD and integrity in multi-layer masksLUONG VINH HOANG·Filed 2011·Granted Dec 18, 2012·16 cites·20 claims
- 0387US9899219B2Trimming inorganic resists with selected etchant gas mixture and modulation of operating variablesTOKYO ELECTRON LTD·Filed 2016·Granted Feb 20, 2018·5 cites·20 claims
- 0479US10260150B2Method and system for sculpting spacer sidewall maskTOKYO ELECTRON LTD·Filed 2018·Granted Apr 16, 2019·2 cites·16 claims
- 0575US10672618B2Systems and methods for patterning features in tantalum nitride (TaN) layerTOKYO ELECTRON LTD·Filed 2018·Granted Jun 2, 2020·2 cites·16 claims
- 0669US7998872B2Method for etching a silicon-containing ARC layer to reduce roughness and CDTOKYO ELECTRON LTD·Filed 2008·Granted Aug 16, 2011·3 cites·21 claims
- 0766US8501628B2Differential metal gate etching processLUONG VINH HOANG·Filed 2010·Granted Aug 6, 2013·2 cites·20 claims
- 0848US8313661B2Deep trench liner removal processLUONG VINH·Filed 2009·Granted Nov 20, 2012·0 cites·20 claims
- 0947US2017053793A1Method and system for sculpting spacer sidewall maskTOKYO ELECTRON LTD·Filed 2016·Application pending·0 cites
- 1040US9978563B2Plasma treatment method to meet line edge roughness and other integration objectivesTOKYO ELECTRON LTD·Filed 2016·Granted May 22, 2018·0 cites·20 claims
- 1136US2012244693A1Method for patterning a full metal gate structureLUONG VINH HOANG·Filed 2011·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →