Inventor · disambiguated record
Viorel Ontalus
Also filed as: ONTALUS VIOREL · ONTALUS VIOREL C
61 granted patents·7 pending applications·205 citations·filing 2006–2022
98Inventor score
Top patents by PatentIndex Score
68 records- 0195US8278164B2Semiconductor structures and methods of manufacturing the sameLI XI·Filed 2010·Granted Oct 2, 2012·19 cites·19 claims
- 0294US8492234B2Field effect transistor deviceCHAN KEVIN K·Filed 2010·Granted Jul 23, 2013·16 cites·12 claims
- 0393US8361847B2Stressed channel FET with source/drain buffersIBM·Filed 2011·Granted Jan 29, 2013·16 cites·15 claims
- 0492US8551845B2Structure and method for increasing strain in a deviceCHAN KEVIN K·Filed 2010·Granted Oct 8, 2013·12 cites·15 claims
- 0587US8940595B2Faceted intrinsic epitaxial buffer layer for reducing short channel effects while maximizing channel stress levelsIBM·Filed 2013·Granted Jan 27, 2015·8 cites·20 claims
- 0687US8193065B2Asymmetric source and drain stressor regionsJOHNSON JEFFREY B·Filed 2011·Granted Jun 5, 2012·7 cites·5 claims
- 0787US8035141B2Bi-layer nFET embedded stressor element and integration to enhance drive currentIBM·Filed 2009·Granted Oct 11, 2011·15 cites·24 claims
- 0886US11810951B2Semiconductor-on-insulator field effect transistor with performance-enhancing source/drain shapes and/or materialsGLOBALFOUNDRIES US INC·Filed 2021·Granted Nov 7, 2023·1 cites·18 claims
- 0986US8343825B2Reducing dislocation formation in semiconductor devices through targeted carbon implantationIBM·Filed 2011·Granted Jan 1, 2013·7 cites·21 claims
- 1085US10374090B2Replacement body FinFET for improved junction profile with gate self-aligned junctionsGLOBALFOUNDRIES INC·Filed 2017·Granted Aug 6, 2019·3 cites·20 claims
- 1185US9059292B2Source and drain doping profile control employing carbon-doped semiconductor materialONTALUS VIOREL·Filed 2012·Granted Jun 16, 2015·8 cites·6 claims
- 1285US8394712B2Cavity-free interface between extension regions and embedded silicon-carbon alloy source/drain regionsDUBE ABHISHEK·Filed 2011·Granted Mar 12, 2013·8 cites·25 claims
- 1383US9287399B2Faceted intrinsic epitaxial buffer layer for reducing short channel effects while maximizing channel stress levelsIBM·Filed 2014·Granted Mar 15, 2016·5 cites·16 claims
- 1483US8741725B2Butted SOI junction isolation structures and devices and method of fabricationJOHNSON JEFFREY B·Filed 2010·Granted Jun 3, 2014·6 cites·22 claims
- 1581US11217685B2Heterojunction bipolar transistor with marker layerGLOBALFOUNDRIES US INC·Filed 2020·Granted Jan 4, 2022·1 cites·20 claims
- 1681US8541814B2Minimizing leakage current and junction capacitance in CMOS transistors by utilizing dielectric spacersCHIDAMBARRAO DURESETI·Filed 2011·Granted Sep 24, 2013·4 cites·8 claims
- 1780US8236709B2Method of fabricating a device using low temperature anneal processes, a device and design structureDOMENICUCCI ANTHONY G·Filed 2009·Granted Aug 7, 2012·6 cites·20 claims
- 1878US8618617B2Field effect transistor deviceIBM·Filed 2013·Granted Dec 31, 2013·3 cites·9 claims
- 1978US7786025B1Activating dopants using multiple consecutive millisecond-range annealsIBM·Filed 2009·Granted Aug 31, 2010·8 cites·8 claims
- 2076US8921939B2Stressed channel FET with source/drain buffersIBM·Filed 2013·Granted Dec 30, 2014·3 cites·8 claims
- 2175US9536989B1Field-effect transistors with source/drain regions of reduced topographyGLOBALFOUNDRIES INC·Filed 2016·Granted Jan 3, 2017·2 cites·11 claims
- 2275US8338279B2Reduced pattern loading for doped epitaxial process and semiconductor structureDUBE ABHISHEK·Filed 2011·Granted Dec 25, 2012·3 cites·16 claims
- 2374US8604564B2Semiconductor structures and methods of manufacturing the sameLI XI·Filed 2012·Granted Dec 10, 2013·2 cites·18 claims
- 2472US9059286B2Pre-gate, source/drain strain layer formationIBM·Filed 2014·Granted Jun 16, 2015·2 cites·11 claims
- 2572US8546219B2Reducing performance variation of narrow channel devicesWEHELLA-GAMAGE DEEPAL·Filed 2011·Granted Oct 1, 2013·5 cites·17 claims
- 2672US7502658B1Methods of fabricating optimization involving process sequence analysisIBM·Filed 2008·Granted Mar 10, 2009·9 cites·2 claims
- 2771US9673295B2Contact resistance optimization via EPI growth engineeringGLOBALFOUNDRIES INC·Filed 2014·Granted Jun 6, 2017·3 cites·20 claims
- 2870US7855110B2Field effect transistor and method of fabricating sameIBM·Filed 2008·Granted Dec 21, 2010·3 cites·15 claims
- 2968US8895384B2Gate structures and methods of manufactureKWON UNOH·Filed 2011·Granted Nov 25, 2014·2 cites·13 claims
- 3067US9013008B2Semiconductor structures and methods of manufacturing the sameIBM·Filed 2013·Granted Apr 21, 2015·1 cites·16 claims
- 3166US9059285B2Structure and method for increasing strain in a deviceIBM·Filed 2013·Granted Jun 16, 2015·1 cites·10 claims
- 3266US8378424B2Semiconductor structure having test and transistor structuresIBM·Filed 2012·Granted Feb 19, 2013·1 cites·4 claims
- 3366US8236660B2Monolayer dopant embedded stressor for advanced CMOSCHAN KEVIN K·Filed 2010·Granted Aug 7, 2012·2 cites·5 claims
- 3466US7337033B1Data mining to detect performance quality of tools used repetitively in manufacturingIBM·Filed 2006·Granted Feb 26, 2008·5 cites·19 claims
- 3562US12336206B2Heterojunction bipolar transistors with a cut stress linerGLOBALFOUNDRIES US INC·Filed 2022·Granted Jun 17, 2025·0 cites·20 claims
- 3660US11588043B2Bipolar transistor with elevated extrinsic base and methods to form sameGLOBALFOUNDRIES US INC·Filed 2021·Granted Feb 21, 2023·0 cites·16 claims
- 3760US7687338B2Method of reducing embedded SiGe loss in semiconductor device manufacturingIBM·Filed 2007·Granted Mar 30, 2010·6 cites·20 claims
- 3858US11056533B1Bipolar junction transistor device with piezoelectric material positioned adjacent theretoGLOBALFOUNDRIES US INC·Filed 2020·Granted Jul 6, 2021·0 cites·20 claims
- 3958US9006052B2Self aligned device with enhanced stress and methods of manufactureHOLT JUDSON R·Filed 2010·Granted Apr 14, 2015·1 cites·19 claims
- 4057US11728380B2Bipolar transistor with base horizontally displaced from collectorGLOBALFOUNDRIES US INC·Filed 2021·Granted Aug 15, 2023·0 cites·20 claims
- 4157US8426265B2Method for growing strain-inducing materials in CMOS circuits in a gate first flowBAI BO·Filed 2010·Granted Apr 23, 2013·1 cites·16 claims
- 4256US12113070B2Transistor integration on a silicon-on-insulator substrateGLOBALFOUNDRIES US INC·Filed 2022·Granted Oct 8, 2024·0 cites·20 claims
- 4356US9231108B2Source and drain doping profile control employing carbon-doped semiconductor materialIBM·Filed 2014·Granted Jan 5, 2016·0 cites·16 claims
- 4456US2011049582A1Asymmetric source and drain stressor regionsIBM·Filed 2009·Application pending·0 cites
- 4555US9171844B2Gate structures and methods of manufactureIBM·Filed 2014·Granted Oct 27, 2015·0 cites·12 claims
- 4655US8993395B2Minimizing leakage current and junction capacitance in CMOS transistors by utilizing dielectric spacersIBM·Filed 2013·Granted Mar 31, 2015·0 cites·9 claims
- 4754US9385237B2Source and drain doping profile control employing carbon-doped semiconductor materialIBM·Filed 2015·Granted Jul 5, 2016·0 cites·17 claims
- 4853US9105718B2Butted SOI junction isolation structures and devices and method of fabricationIBM·Filed 2014·Granted Aug 11, 2015·0 cites·30 claims
- 4951US11916135B2Bipolar transistorGLOBALFOUNDRIES US INC·Filed 2022·Granted Feb 27, 2024·0 cites·20 claims
- 5051US11404563B2Insulated-gate bipolar transistor with enhanced frequency response, and related methodsGLOBALFOUNDRIES US INC·Filed 2019·Granted Aug 2, 2022·0 cites·14 claims
Showing the top 50 of 68 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →