Inventor · disambiguated record
Vivek Raghavan
Also filed as: RAGHAVAN VIVEK
7 granted patents·290 citations·filing 1992–2013
86Inventor score
Technology areasG06F
Top patents by PatentIndex Score
7 records- 0183US8572523B2Lithography aware leakage analysisTUNCER EMRE·Filed 2007·Granted Oct 29, 2013·17 cites·19 claims
- 0283US5313398AMethod and apparatus for simulating a microelectronic circuitUNIV CARNEGIE MELLON·Filed 1992·Granted May 17, 1994·116 cites·24 claims
- 0376US5896300AMethods, apparatus and computer program products for performing post-layout verification of microelectronic circuits by filtering timing error bounds for layout critical netsAVANT CORP·Filed 1996·Granted Apr 20, 1999·84 cites·56 claims
- 0473US6286126B1Methods, apparatus and computer program products for performing post-layout verification of microelectronic circuits using best and worst case delay models for nets thereinAVANT CORP·Filed 1999·Granted Sep 4, 2001·68 cites·3 claims
- 0562US7434188B1Lithographically optimized placement toolMAGMA DESIGN AUTOMATION INC·Filed 2006·Granted Oct 7, 2008·4 cites·25 claims
- 0653US8473876B2Lithography aware timing analysisTUNCER EMRE·Filed 2007·Granted Jun 25, 2013·1 cites·17 claims
- 0752US9576098B2Lithography aware leakage analysisSYNOPSYS INC·Filed 2013·Granted Feb 21, 2017·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →