Inventor · disambiguated record
Walter J. Ghijsen
Also filed as: GHIJSEN WALTER · GHIJSEN WALTER J · GHIJSEN WALTER JOHAN
7 granted patents·84 citations·filing 1999–2018
83Inventor score
Technology areasG06F
Top patents by PatentIndex Score
7 records- 0189US9524366B1Annotations to identify objects in design generated by high level synthesis (HLS)CADENCE DESIGN SYSTEMS INC·Filed 2015·Granted Dec 20, 2016·17 cites·20 claims
- 0287US10248747B1Integrated circuit simulation with data persistency for efficient memory usageCADENCE DESIGN SYSTEMS INC·Filed 2017·Granted Apr 2, 2019·8 cites·20 claims
- 0380US10248745B1Integrated circuit simulation with variability analysis for efficient memory usageCADENCE DESIGN SYSTEMS INC·Filed 2017·Granted Apr 2, 2019·4 cites·17 claims
- 0474US10635770B1Methods, systems, and computer program products for implementing an electronic design with hybrid analysis techniquesCADENCE DESIGN SYSTEMS INC·Filed 2018·Granted Apr 28, 2020·2 cites·20 claims
- 0568US6381563B1System and method for simulating circuits using inline subcircuitsCADENCE DESIGN SYSTEMS INC·Filed 1999·Granted Apr 30, 2002·52 cites·47 claims
- 0665US10303828B1Integrated circuit simulation with efficient memory usageCADENCE DESIGN SYSTEMS INC·Filed 2017·Granted May 28, 2019·1 cites·20 claims
- 0739US8856700B1Methods, systems, and apparatus for reliability synthesisWATANABE YOSINORI·Filed 2008·Granted Oct 7, 2014·0 cites·28 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →