Inventor · disambiguated record
Wei Hwang
Also filed as: HWANG WEI · HWANG WEI-RU
57 granted patents·2 pending applications·3,473 citations·filing 1984–2006
99Inventor score
Top patents by PatentIndex Score
59 records- 0196US6620659B2Merged logic and memory combining thin film and bulk Si transistorsIBM·Filed 2001·Granted Sep 16, 2003·349 cites·7 claims
- 0296US5107459AStacked bit-line architecture for high density cross-point memory cell arrayIBM·Filed 1990·Granted Apr 21, 1992·165 cites·14 claims
- 0396US4881105AIntegrated trench-transistor structure and fabrication processIBM·Filed 1988·Granted Nov 14, 1989·126 cites·11 claims
- 0495US5214603AFolded bitline, ultra-high density dynamic random access memory having access transistors stacked above trench storage capacitorsIBM·Filed 1991·Granted May 25, 1993·104 cites·13 claims
- 0595US5021355AMethod of fabricating cross-point lightly-doped drain-source trench transistorIBM·Filed 1990·Granted Jun 4, 1991·242 cites·5 claims
- 0694US6437623B1Data retention registersIBM·Filed 2001·Granted Aug 20, 2002·64 cites·18 claims
- 0794US6271542B1Merged logic and memory combining thin film and bulk Si transistorsIBM·Filed 1997·Granted Aug 7, 2001·119 cites·11 claims
- 0894US5790839ASystem integration of DRAM macros and logic cores in a single chip architectureIBM·Filed 1996·Granted Aug 4, 1998·142 cites·10 claims
- 0994US5362663AMethod of forming double well substrate plate trench DRAM cell arrayIBM·Filed 1993·Granted Nov 8, 1994·93 cites·6 claims
- 1093US4954854ACross-point lightly-doped drain-source trench transistor and fabrication process thereforIBM·Filed 1989·Granted Sep 4, 1990·131 cites·3 claims
- 1193US4922128ABoost clock circuit for driving redundant wordlines and sample wordlinesIBM·Filed 1989·Granted May 1, 1990·82 cites·9 claims
- 1293US4833516AHigh density memory cell structure having a vertical trench transistor self-aligned with a vertical trench capacitor and fabrication methods thereforIBM·Filed 1987·Granted May 23, 1989·83 cites·4 claims
- 1392US5144165ACMOS off-chip driver circuitsIBM·Filed 1990·Granted Sep 1, 1992·74 cites·16 claims
- 1489US5901304AEmulating quasi-synchronous DRAM with asynchronous DRAMIBM·Filed 1997·Granted May 4, 1999·76 cites·10 claims
- 1589US5883814ASystem-on-chip layout compilationIBM·Filed 1997·Granted Mar 16, 1999·155 cites·11 claims
- 1689US4816884AHigh density vertical trench transistor and capacitor memory cell structure and fabrication method thereforIBM·Filed 1987·Granted Mar 28, 1989·60 cites·3 claims
- 1788US5292678AForming a bit line configuration for semiconductor memoryIBM·Filed 1992·Granted Mar 8, 1994·68 cites·1 claims
- 1887US6285050B1Decoupling capacitor structure distributed above an integrated circuit and method for making sameIBM·Filed 1997·Granted Sep 4, 2001·71 cites·8 claims
- 1986US6307805B1High performance semiconductor memory device with low power consumptionIBM·Filed 2000·Granted Oct 23, 2001·42 cites·17 claims
- 2086US5571743AMethod of making buried-sidewall-strap two transistor one capacitor trench cellIBM·Filed 1994·Granted Nov 5, 1996·47 cites·8 claims
- 2186US5359552APower supply tracking regulator for a memory arrayIBM·Filed 1993·Granted Oct 25, 1994·48 cites·5 claims
- 2285US5973529APulse-to-static conversion latch with a self-timed control circuitIBM·Filed 1997·Granted Oct 26, 1999·47 cites·16 claims
- 2385US5336629AFolder Bitline DRAM having access transistors stacked above trench storage capacitors, each such transistor employing a planar semiconductor body which spans adjacent capacitorsIBM·Filed 1992·Granted Aug 9, 1994·45 cites·3 claims
- 2485US5250829ADouble well substrate plate trench DRAM cell arrayIBM·Filed 1992·Granted Oct 5, 1993·47 cites·5 claims
- 2585US5170243ABit line configuration for semiconductor memoryIBM·Filed 1991·Granted Dec 8, 1992·54 cites·5 claims
- 2685US4988637AMethod for fabricating a mesa transistor-trench capacitor memory cell structureIBM·Filed 1990·Granted Jan 29, 1991·53 cites·9 claims
- 2783US6230290B1Method of self programmed built in self testIBM·Filed 1997·Granted May 8, 2001·54 cites·20 claims
- 2881US5268871APower supply tracking regulator for a memory arrayIBM·Filed 1991·Granted Dec 7, 1993·36 cites·11 claims
- 2981US5253202AWord line driver circuit for dynamic random access memoriesIBM·Filed 1991·Granted Oct 12, 1993·48 cites·6 claims
- 3081US5157634ADram having extended refresh timeIBM·Filed 1990·Granted Oct 20, 1992·48 cites·7 claims
- 3180US5453953ABandgap voltage reference generatorIBM·Filed 1994·Granted Sep 26, 1995·35 cites·4 claims
- 3278US4754433ADynamic ram having multiplexed twin I/O line pairsIBM·Filed 1986·Granted Jun 28, 1988·38 cites·11 claims
- 3376US6492227B1Method for fabricating flash memory device using dual damascene processIBM·Filed 2000·Granted Dec 10, 2002·22 cites·25 claims
- 3476US6175949B1Method and system for selecting sizes of components for integrated circuitsIBM·Filed 1998·Granted Jan 16, 2001·81 cites·18 claims
- 3574US5064777AFabrication method for a double trench memory cell deviceIBM·Filed 1991·Granted Nov 12, 1991·46 cites·8 claims
- 3673US5481495ACells and read-circuits for high-performance register filesIBM·Filed 1994·Granted Jan 2, 1996·31 cites·8 claims
- 3771US6108798ASelf programmed built in self testIBM·Filed 1997·Granted Aug 22, 2000·30 cites·15 claims
- 3871US4954731AWordline voltage boosting circuits for complementary MOSFET dynamic memoriesIBM·Filed 1989·Granted Sep 4, 1990·27 cites·11 claims
- 3968US6090153AMulti-threshold-voltage differential cascode voltage switch (DCVS) circuitsIBM·Filed 1997·Granted Jul 18, 2000·52 cites·19 claims
- 4066US5777491AHigh-performance differential cascode voltage switch with pass gate logic elementsIBM·Filed 1996·Granted Jul 7, 1998·53 cites·20 claims
- 4165US5780335AMethod of forming a buried-sidewall-strap two transistor one capacitor trench cellIBM·Filed 1996·Granted Jul 14, 1998·22 cites·17 claims
- 4264US5075571APMOS wordline boost cricuit for DRAMIBM·Filed 1991·Granted Dec 24, 1991·23 cites·10 claims
- 4362US6219822B1Method and system for tuning of components for integrated circuitsIBM·Filed 1998·Granted Apr 17, 2001·43 cites·32 claims
- 4462US4763180AMethod and structure for a high density VMOS dynamic ram arrayIBM·Filed 1986·Granted Aug 9, 1988·27 cites·4 claims
- 4561US6890766B2Dual-type thin-film field-effect transistors and applicationsIBM·Filed 2003·Granted May 10, 2005·12 cites·5 claims
- 4655US6151266AAsynchronous multiport register file with self resetting write operationIBM·Filed 1997·Granted Nov 21, 2000·29 cites·16 claims
- 4755US5185719AHigh speed dynamic, random access memory with extended reset/precharge timeIBM·Filed 1990·Granted Feb 9, 1993·27 cites·5 claims
- 4855US4532698AMethod of making ultrashort FET using oblique angle metal deposition and ion implantationIBM·Filed 1984·Granted Aug 6, 1985·18 cites·5 claims
- 4954US5034787AStructure and fabrication method for a double trench memory cell deviceIBM·Filed 1990·Granted Jul 23, 1991·16 cites·8 claims
- 5053US6279144B1Provably correct storage arraysIBM·Filed 1999·Granted Aug 21, 2001·15 cites·10 claims
Showing the top 50 of 59 patent records by PatentIndex Score.
Join the waitlist — get patent alerts
Get an alert when Wei Hwang files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →