Dual-type thin-film field-effect transistors and applications

Abstract

A microelectronic device includes a gate layer adapted to receive an input voltage. An insulating layer is formed on the gate layer, and a conductive channel layer is formed on the insulating layer and carries current between a source and a drain. The conductive channel layer is adapted to provide a dual channel. The dual channel includes both a p-channel and an n-channel wherein one of the p-channel and the n-channel are selectively enabled responsive to the input voltage polarity. A method for forming the device and applications are also disclosed and claimed.

1. A method for forming a transistor having a chemically undoped channel that provides an electronically induced p-channel or n-channel conduction based on a polarity of an applied gate voltage, the method comprising the steps of:
 forming a gate layer;  
 depositing an insulating layer on the gate layer;  
 forming a chemically undoped channel layer on the insulating layer by: 
 epitaxially depositing a cuprate layer on the insulating layer in an oxygen environment to provide a substantially defect free cuprate layer, the cuprate layer comprising YBCO; and  
 annealing the cuprate layer in a reducing environment and oxygen annealing the cuprate layer to adjust an oxygen content of the cuprate layer to provide a channel layer of YBa 2 Cu 3 O 7−δ  where δ is between about 0 and about 1; and  
 
 forming source and drain electrodes on the chemically undoped channel layer.  
 
   
   
     2. The method as recited in  claim 1 , wherein the step of forming a gate layer includes the step of patterning the gate layer to form a recessed gate structure. 
   
   
     3. The method as recited in  claim 1 , wherein the step of forming a gale layer includes the step of doping the gate layer. 
   
   
     4. The method as recited in  claim 1 , wherein the step of annealing includes the step of maintaining a temperature of between about 200° C. and about 500° C. for between about 0.2 hours and about 5 hours. 
   
   
     5. The method as recited in  claim 1 , wherein the step of annealing includes the steps of annealing in a reducing environment including one of a vacuum and an inert gas.