Inventor · disambiguated record
Wlodek Kurjanowicz
Also filed as: KURJANOWICZ WLODEK
37 granted patents·809 citations·filing 2002–2019
98Inventor score
Top patents by PatentIndex Score
37 records- 0199US7402855B2Split-channel antifuse array architectureSIDENSE CORP·Filed 2005·Granted Jul 22, 2008·109 cites·4 claims
- 0298US8526254B2Test cells for an unprogrammed OTP memory arrayKURJANOWICZ WLODEK·Filed 2011·Granted Sep 3, 2013·61 cites·20 claims
- 0397US10777288B2One time programmable (OTP) bit cell with integrated inhibit deviceSYNOPSYS INC·Filed 2019·Granted Sep 15, 2020·16 cites·22 claims
- 0497US8369166B2Redundancy system for non-volatile memorySIDENSE CORP·Filed 2010·Granted Feb 5, 2013·69 cites·9 claims
- 0597US7764532B2High speed OTP sensing schemeSIDENSE CORP·Filed 2009·Granted Jul 27, 2010·93 cites·8 claims
- 0696US7642138B2Split-channel antifuse array architectureSIDENSE CORP·Filed 2007·Granted Jan 5, 2010·34 cites·8 claims
- 0795US9129687B2OTP memory cell having low current leakageKURJANOWICZ WLODEK·Filed 2010·Granted Sep 8, 2015·15 cites·20 claims
- 0895US8213211B2High reliability OTP memoryKURJANOWICZ WLODEK·Filed 2010·Granted Jul 3, 2012·26 cites·33 claims
- 0995US7755162B2Anti-fuse memory cellSIDENSE CORP·Filed 2007·Granted Jul 13, 2010·37 cites·21 claims
- 1094US9123572B2Anti-fuse memory cellSIDENSE CORP·Filed 2014·Granted Sep 1, 2015·19 cites·17 claims
- 1194US7511982B2High speed OTP sensing schemeSIDENSE CORP·Filed 2006·Granted Mar 31, 2009·28 cites·22 claims
- 1293US8283751B2Split-channel antifuse array architectureKURJANOWICZ WLODEK·Filed 2008·Granted Oct 9, 2012·21 cites·12 claims
- 1392US8933492B2Low VT antifuse deviceKURJANOWICZ WLODEK·Filed 2008·Granted Jan 13, 2015·25 cites·30 claims
- 1492US8026574B2Anti-fuse memory cellSIDENSE CORP·Filed 2010·Granted Sep 27, 2011·13 cites·5 claims
- 1591US8767433B2Methods for testing unprogrammed OTP memoryKURJANOWICZ WLODEK·Filed 2012·Granted Jul 1, 2014·13 cites·15 claims
- 1688US7817456B2Program lock circuit for a mask programmable anti-fuse memory arraySIDENSE CORP·Filed 2007·Granted Oct 19, 2010·12 cites·11 claims
- 1786US8130532B2High speed OTP sensing schemeKURJANOWICZ WLODEK·Filed 2010·Granted Mar 6, 2012·7 cites·20 claims
- 1885US6826069B2Interleaved wordline architectureATMOS CORP·Filed 2003·Granted Nov 30, 2004·41 cites·31 claims
- 1982US8471355B2AND-type one time programmable memory cellKURJANOWICZ WLODEK·Filed 2009·Granted Jun 25, 2013·9 cites·14 claims
- 2082US7944727B2Mask programmable anti-fuse architectureSIDENSE CORP·Filed 2007·Granted May 17, 2011·8 cites·29 claims
- 2180US8223526B2Low power antifuse sensing scheme with improved reliabilityKURJANOWICZ WLODEK·Filed 2010·Granted Jul 17, 2012·5 cites·26 claims
- 2280US8023338B2Dual function data registerSIDENSE CORP·Filed 2007·Granted Sep 20, 2011·8 cites·23 claims
- 2378US8735297B2Reverse optical proximity correction methodSIDENSE CORP·Filed 2012·Granted May 27, 2014·4 cites·10 claims
- 2478US8059479B2Test circuit for an unprogrammed OTP memory arrayKURJANOWICZ WLODEK·Filed 2008·Granted Nov 15, 2011·10 cites·20 claims
- 2576US8313987B2Anti-fuse memory cellKURJANOWICZ WLODEK·Filed 2011·Granted Nov 20, 2012·3 cites·23 claims
- 2676US6549483B2RAM having dynamically switchable access modesATMOS CORP·Filed 2002·Granted Apr 15, 2003·24 cites·16 claims
- 2774US7940595B2Power up detection system for a memory deviceSIDENSE CORP·Filed 2007·Granted May 10, 2011·6 cites·24 claims
- 2874US6687146B2Interleaved wordline architectureATMOS CORP·Filed 2002·Granted Feb 3, 2004·19 cites·19 claims
- 2973US6894941B2RAM having dynamically switchable access modesATMOS CORP·Filed 2002·Granted May 17, 2005·20 cites·13 claims
- 3073US6584036B2SRAM emulatorATMOS CORP·Filed 2002·Granted Jun 24, 2003·27 cites·32 claims
- 3167US8082476B2Program verify method for OTP memoriesKURJANOWICZ WLODEK·Filed 2007·Granted Dec 20, 2011·4 cites·10 claims
- 3264US8654598B2Redundancy system for non-volatile memorySIDENSE CORP·Filed 2013·Granted Feb 18, 2014·1 cites·20 claims
- 3364US6611062B2Twisted wordline strapping arrangementATMOS CORP·Filed 2002·Granted Aug 26, 2003·12 cites·9 claims
- 3460US8266483B2Method for operating a register stage of a dual function data registerKURJANOWICZ WLODEK·Filed 2011·Granted Sep 11, 2012·1 cites·10 claims
- 3555US6687177B2Reference cells with integration capacitorATMOS CORP·Filed 2002·Granted Feb 3, 2004·8 cites·18 claims
- 3653US9123429B2Redundancy system for non-volatile memorySIDENSE CORP·Filed 2014·Granted Sep 1, 2015·1 cites·19 claims
- 3740US9870810B2Method and system for power signature suppression in memory devicesSIDENSE CORP·Filed 2016·Granted Jan 16, 2018·0 cites·24 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →