Inventor · disambiguated record
Won-Sub Kim
Also filed as: KIM WON-SUB
29 granted patents·5 pending applications·178 citations·filing 1999–2020
95Inventor score
Top patents by PatentIndex Score
34 records- 0178US9164769B2Analyzing data flow graph to detect data for copying from central register file to local register file used in different execution modes in reconfigurable processing arrayKIM WON-SUB·Filed 2010·Granted Oct 20, 2015·6 cites·17 claims
- 0278US8745608B2Scheduler of reconfigurable array, method of scheduling commands, and computing apparatusKIM WON-SUB·Filed 2010·Granted Jun 3, 2014·7 cites·14 claims
- 0376US7900111B1Method and apparatus for random stimulus generationSYNOPSYS INC·Filed 2003·Granted Mar 1, 2011·18 cites·7 claims
- 0471US8555005B2Memory managing apparatus and method using a pointer indicator bit to perform garbage collectionEGGER BERNHARD·Filed 2010·Granted Oct 8, 2013·3 cites·16 claims
- 0569US10474574B2Method and apparatus for system resource managementSAMSUNG ELECTRONICS CO LTD·Filed 2016·Granted Nov 12, 2019·2 cites·20 claims
- 0668US9411582B2Apparatus and method for processing invalid operation in prologue or epilogue of loopSAMSUNG ELECTRONICS CO LTD·Filed 2013·Granted Aug 9, 2016·2 cites·14 claims
- 0766US9395962B2Apparatus and method for executing external operations in prologue or epilogue of a software-pipelined loopAHN MIN-WOOK·Filed 2012·Granted Jul 19, 2016·2 cites·16 claims
- 0866US9311270B2Scheduler and scheduling method for reconfigurable architectureSAMSUNG ELECTRONICS CO LTD·Filed 2014·Granted Apr 12, 2016·2 cites·17 claims
- 0965US6513144B1Method and apparatus for random stimulus generationSYNOPSYS INC·Filed 1999·Granted Jan 28, 2003·27 cites·12 claims
- 1064US9354850B2Method and apparatus for instruction scheduling using software pipeliningSAMSUNG ELECTRONICS CO LTD·Filed 2014·Granted May 31, 2016·1 cites·11 claims
- 1163US8869129B2Apparatus and method for scheduling instructionOH TAE-WOOK·Filed 2009·Granted Oct 21, 2014·3 cites·15 claims
- 1263US6449745B1Method and apparatus for random stimulus generationSYNOPSYS INC·Filed 1999·Granted Sep 10, 2002·25 cites·8 claims
- 1361US9063735B2Reconfigurable processor and method for processing loop having memory dependencyAHN HEE-JIN·Filed 2011·Granted Jun 23, 2015·2 cites·22 claims
- 1459US8930929B2Reconfigurable processor and method for processing a nested loopAHN MIN-WOOK·Filed 2011·Granted Jan 6, 2015·1 cites·19 claims
- 1559US6427223B1Method and apparatus for adaptive verification of circuit designsSYNOPSYS INC·Filed 1999·Granted Jul 30, 2002·36 cites·3 claims
- 1657US6553531B1Method and apparatus for random stimulus generationSYNOPSYS INC·Filed 1999·Granted Apr 22, 2003·18 cites·8 claims
- 1754US9383981B2Method and apparatus of instruction scheduling using software pipeliningSAMSUNG ELECTRONICS CO LTD·Filed 2014·Granted Jul 5, 2016·0 cites·18 claims
- 1848US9971579B2Processor and command processing method performed by sameSAMSUNG ELECTRONICS CO LTD·Filed 2015·Granted May 15, 2018·0 cites·20 claims
- 1947US9632978B2Reconfigurable processor based on mini-cores, schedule apparatus, and method thereofSAMSUNG ELECTRONICS CO LTD·Filed 2013·Granted Apr 25, 2017·0 cites·22 claims
- 2047US2014317628A1Memory apparatus for processing support of long routing in processor, and scheduling apparatus and method using the memory apparatusSAMSUNG ELECTRONICS CO LTD·Filed 2014·Application pending·0 cites
- 2144US12499175B2Matrix multiplication method and device based on Winograd algorithmREBELLIONS INC·Filed 2020·Granted Dec 16, 2025·0 cites·13 claims
- 2244US9262162B2Register file and computing device using the sameEGGER BERNHARD·Filed 2011·Granted Feb 16, 2016·0 cites·20 claims
- 2344US8850170B2Apparatus and method for dynamically determining execution mode of reconfigurable arrayEGGER BERNHARD·Filed 2011·Granted Sep 30, 2014·0 cites·17 claims
- 2443US7063989B2Method of aligning a semiconductor substrate with a semiconductor alignment apparatusSAMSUNG ELECTRONICS CO LTD·Filed 2004·Granted Jun 20, 2006·2 cites·6 claims
- 2542US10223269B2Method and apparatus for preventing bank conflict in memorySAMSUNG ELECTRONICS CO LTD·Filed 2015·Granted Mar 5, 2019·0 cites·20 claims
- 2641US9727528B2Reconfigurable processor with routing node frequency based on the number of routing nodesEGGER BERNHARD·Filed 2011·Granted Aug 8, 2017·0 cites·12 claims
- 2741US6493841B1Method and apparatus for determining expected values during circuit design verificationSYNOPSYS INC·Filed 1999·Granted Dec 10, 2002·13 cites·15 claims
- 2841US2013238877A1Core system for processing an interrupt and method for transmission of vector register file data thereforLEE JIN-SEOK·Filed 2012·Application pending·0 cites
- 2940US9286074B2NOP instruction compressing apparatus and method in a VLIW machineJIN TAI-SONG·Filed 2010·Granted Mar 15, 2016·0 cites·1 claims
- 3039US2012089823A1Processing apparatus, compiling apparatus, and dynamic conditional branch processing methodJIN TAI-SONG·Filed 2011·Application pending·0 cites
- 3138US9304967B2Reconfigurable processor using power gating, compiler and compiling method thereofYOO SUNG-JOO·Filed 2011·Granted Apr 5, 2016·0 cites·7 claims
- 3238US6499127B1Method and apparatus for random stimulus generationSYNOPSYS INC·Filed 1999·Granted Dec 24, 2002·8 cites·10 claims
- 3337US2012144399A1Apparatus and method for synchronization of threadsKIM WON SUB·Filed 2011·Application pending·0 cites
- 3437US2011225399A1Processor and method for supporting multiple input multiple output operationSAMSUNG ELECTRONICS CO LTD·Filed 2010·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →