Inventor · disambiguated record
Wuu Yean Tay
Also filed as: TAY WUU Y · TAY WUU YEAN
29 granted patents·1 pending application·669 citations·filing 2000–2017
97Inventor score
Top patents by PatentIndex Score
30 records- 0198US6522018B1Ball grid array chip packages having improved testing and stacking characteristicsMICRON TECHNOLOGY INC·Filed 2000·Granted Feb 18, 2003·244 cites·42 claims
- 0297US7754531B2Method for packaging microelectronic devicesMICRON TECHNOLOGY INC·Filed 2006·Granted Jul 13, 2010·49 cites·12 claims
- 0395US6420789B1Ball grid array chip packages having improved testing and stacking characteristicsMICRON TECHNOLOGY INC·Filed 2001·Granted Jul 16, 2002·72 cites·8 claims
- 0491US6693363B2Ball grid array chip packages having improved testing and stacking characteristicsMICRON TECHNOLOGY INC·Filed 2002·Granted Feb 17, 2004·38 cites·8 claims
- 0591US6448664B1Ball grid array chip packages having improved testing and stacking characteristicsMICRON TECHNOLOGY INC·Filed 2001·Granted Sep 10, 2002·37 cites·24 claims
- 0685US6600335B2Method for ball grid array chip packages having improved testing and stacking characteristicsMICRON TECHNOLOGY INC·Filed 2001·Granted Jul 29, 2003·23 cites·7 claims
- 0783US6787923B2Solder masks for use on carrier substrates, carrier substrates and semiconductor device assemblies including such solder masksMICRON TECHNOLOGY INC·Filed 2002·Granted Sep 7, 2004·32 cites·29 claims
- 0881US7915718B2Apparatus for flip-chip packaging providing testing capabilityMICRON TECHNOLOGY INC·Filed 2002·Granted Mar 29, 2011·29 cites·32 claims
- 0981US7190074B2Reconstructed semiconductor wafers including alignment droplets contacting alignment viasMICRON TECHNOLOGY INC·Filed 2005·Granted Mar 13, 2007·5 cites·6 claims
- 1080US7071012B2Methods relating to the reconstruction of semiconductor wafers for wafer-level processingMICRON TECHNOLOGY INC·Filed 2003·Granted Jul 4, 2006·17 cites·23 claims
- 1177US8525320B2Microelectronic die packages with leadframes, including leadframe-based interposer for stacked die packages, and associated systems and methodsENG MEOW KOON·Filed 2011·Granted Sep 3, 2013·4 cites·18 claims
- 1277US7116122B2Method for ball grid array chip packages having improved testing and stacking characteristicsMICRON TECHNOLOGY INC·Filed 2005·Granted Oct 3, 2006·4 cites·21 claims
- 1376US7368391B2Methods for designing carrier substrates with raised terminalsMICRON TECHNOLOGY INC·Filed 2005·Granted May 6, 2008·8 cites·39 claims
- 1476US6740984B2Ball grid array chip packages having improved testing and stacking characteristicsMICRON TECHNOLOGY INC·Filed 2003·Granted May 25, 2004·12 cites·20 claims
- 1575US7030640B2Integrated circuit (IC) test assembly including phase change material for stabilizing temperature during stress testing of integrated circuits and method thereofMICRON TECHNOLOGY INC·Filed 2004·Granted Apr 18, 2006·15 cites·12 claims
- 1674US6740983B2Method for ball grind array chip packages having improved testing and stacking characteristicsMICRON TECHNOLOGY INC·Filed 2002·Granted May 25, 2004·11 cites·32 claims
- 1774US6674175B2Ball grid array chip packages having improved testing and stacking characteristicsMICRON TECHNOLOGY INC·Filed 2002·Granted Jan 6, 2004·11 cites·8 claims
- 1874US6522019B2Ball grid array chip packages having improved testing and stacking characteristicsMICRON TECHNOLOGY INC·Filed 2002·Granted Feb 18, 2003·11 cites·8 claims
- 1971US7425462B2Methods relating to the reconstruction of semiconductor wafers for wafer-level processingMICRON TECHNOLOGY INC·Filed 2006·Granted Sep 16, 2008·2 cites·16 claims
- 2071US7285971B2Integrated circuit (IC) test assembly including phase change material for stabilizing temperature during stress testing of integrated circuits and method thereofMICRON TECHNOLOGY INC·Filed 2005·Granted Oct 23, 2007·5 cites·8 claims
- 2169US6847220B2Method for ball grid array chip packages having improved testing and stacking characteristicsMICRON TECHNOLOGY INC·Filed 2003·Granted Jan 25, 2005·8 cites·7 claims
- 2266US7820459B2Methods relating to the reconstruction of semiconductor wafers for wafer level processing including forming of alignment protrusion and removal of alignment materialMICRON TECHNOLOGY INC·Filed 2008·Granted Oct 26, 2010·1 cites·13 claims
- 2365US8357566B2Pre-encapsulated lead frames for microelectronic device packages, and associated methodsMICRON TECHNOLOGY INC·Filed 2006·Granted Jan 22, 2013·2 cites·35 claims
- 2465US7061124B2Solder masks including dams for at least partially surrounding terminals of a carrier substrate and recessed areas positioned adjacent to the dams, and carrier substrates including such solder masksMICRON TECHNOLOGY INC·Filed 2004·Granted Jun 13, 2006·10 cites·23 claims
- 2565US7018871B2Solder masks for use on carrier substrates, carrier substrates and semiconductor device assemblies including such solder masks, and methodsMICRON TECHNOLOGY INC·Filed 2003·Granted Mar 28, 2006·10 cites·27 claims
- 2659US6856155B2Methods and apparatus for testing and burn-in of semiconductor devicesMICRON TECHNOLOGY INC·Filed 2002·Granted Feb 15, 2005·9 cites·28 claims
- 2755US11189548B2Pre-encapsulated lead frames for microelectronic device packages, and associated methodsMICRON TECHNOLOGY INC·Filed 2017·Granted Nov 30, 2021·0 cites·18 claims
- 2853US9721874B2Pre-encapsulated lead frames for microelectronic device packages, and associated methodsMICRON TECHNOLOGY INC·Filed 2013·Granted Aug 1, 2017·0 cites·13 claims
- 2952US7573006B2Apparatus relating to the reconstruction of semiconductor wafers for wafer-level processingMICRON TECHNOLOGY INC·Filed 2005·Granted Aug 11, 2009·0 cites·20 claims
- 3046US2006240595A1Method and apparatus for flip-chip packaging providing testing capabilityLEE TECK K·Filed 2006·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →