Inventor · disambiguated record
Xiaoping Tang
Also filed as: TANG XIAOPING
20 granted patents·1 pending application·316 citations·filing 2001–2025
95Inventor score
Top patents by PatentIndex Score
21 records- 0197US7962879B2VLSI artwork legalization for hierarchical designs with multiple grid constraintsIBM·Filed 2008·Granted Jun 14, 2011·118 cites·5 claims
- 0296US8484607B1Decomposing layout for triple patterning lithographyTANG XIAOPING·Filed 2012·Granted Jul 9, 2013·64 cites·20 claims
- 0393US8799844B2Layout decomposition method and apparatus for multiple patterning lithographyCHO MINSIK·Filed 2011·Granted Aug 5, 2014·11 cites·9 claims
- 0489US7904840B2Method and system to redistribute white space for minimizing wire lengthIBM·Filed 2007·Granted Mar 8, 2011·18 cites·14 claims
- 0586USD1086775SStrawTANG XIAOPING·Filed 2025·Granted Aug 5, 2025·1 cites·1 claims
- 0686US7437691B2VLSI artwork legalization for hierarchical designs with multiple grid constraintsIBM·Filed 2006·Granted Oct 14, 2008·14 cites·15 claims
- 0785US8423941B2Structural migration of integrated circuit layoutHENG FOOK-LUEN·Filed 2011·Granted Apr 16, 2013·9 cites·25 claims
- 0884US8627247B1Systems and methods for fixing pin mismatch in layout migrationMCCULLEN KEVIN W·Filed 2012·Granted Jan 7, 2014·10 cites·20 claims
- 0983US6867194B2Enzyme activated nitric oxide donorsUNIV WAYNE STATE·Filed 2001·Granted Mar 15, 2005·22 cites·20 claims
- 1081US7305641B2Method and system to redistribute white space for minimizing wire lengthIBM·Filed 2005·Granted Dec 4, 2007·10 cites·14 claims
- 1179US7761818B2Obtaining a feasible integer solution in a hierarchical circuit layout optimizationIBM·Filed 2007·Granted Jul 20, 2010·10 cites·15 claims
- 1278US8302062B2Methods to obtain a feasible integer solution in a hierarchical circuit layout optimizationGRAY MICHAEL S·Filed 2010·Granted Oct 30, 2012·6 cites·15 claims
- 1377USD1038189SIce cube mouldTANG XIAOPING·Filed 2024·Granted Aug 6, 2024·4 cites·1 claims
- 1474US8296706B2Handling two-dimensional constraints in integrated circuit layoutGRAY MICHAEL S·Filed 2010·Granted Oct 23, 2012·4 cites·20 claims
- 1570US7895562B2Adaptive weighting method for layout optimization with multiple prioritiesIBM·Filed 2007·Granted Feb 22, 2011·5 cites·6 claims
- 1669USD1004090SEar cleanerWei Guanxi·Filed 2021·Granted Nov 7, 2023·4 cites·1 claims
- 1766US8555229B2Parallel solving of layout optimizationTANG XIAOPING·Filed 2011·Granted Oct 8, 2013·2 cites·20 claims
- 1862US9889328B2Connecting structure between trampoline bed and frame, and trampoline and connecting piece using sameTANG XIAOPING·Filed 2014·Granted Feb 13, 2018·3 cites·8 claims
- 1961US8756541B2Relative ordering circuit synthesisCHO MINSIK·Filed 2012·Granted Jun 17, 2014·1 cites·23 claims
- 2048US2009176278A1Solvents for mutant endoglycoceramidases with synthetic activityNEOSE TECHNOLOGIES INC·Filed 2006·Application pending·0 cites
- 2127US11332417B2System and method for preparing aromatics by using syngasHUADIAN COAL IND GROUP CO LTD·Filed 2017·Granted May 17, 2022·0 cites·6 claims
Join the waitlist — get patent alerts
Get an alert when Xiaoping Tang files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →