Inventor · disambiguated record
Xianzhi Tao
Also filed as: TAO XIANZHI · TAO XIANZHI JERRY
10 granted patents·3 pending applications·171 citations·filing 2001–2020
89Inventor score
Top patents by PatentIndex Score
13 records- 0191US9312154B2CVD apparatus for improved film thickness non-uniformity and particle performanceTRAN BINH·Filed 2010·Granted Apr 12, 2016·17 cites·20 claims
- 0291US6479100B2CVD ruthenium seed for CVD ruthenium depositionAPPLIED MATERIALS INC·Filed 2001·Granted Nov 12, 2002·61 cites·53 claims
- 0388US6582522B2Emissivity-change-free pumping plate kit in a single wafer chamberAPPLIED MATERIALS INC·Filed 2001·Granted Jun 24, 2003·37 cites·13 claims
- 0481US7335266B2Method of forming a controlled and uniform lightly phosphorous doped silicon filmAPPLIED MATERIALS INC·Filed 2005·Granted Feb 26, 2008·7 cites·6 claims
- 0580US6559039B2Doped silicon deposition process in resistively heated single wafer chamberAPPLIED MATERIALS INC·Filed 2001·Granted May 6, 2003·23 cites·41 claims
- 0676US6559074B1Method of forming a silicon nitride layer on a substrateAPPLIED MATERIALS INC·Filed 2001·Granted May 6, 2003·19 cites·14 claims
- 0762US6982214B2Method of forming a controlled and uniform lightly phosphorous doped silicon filmAPPLIED MATERIALS INC·Filed 2002·Granted Jan 3, 2006·7 cites·15 claims
- 0856US12015042B2Structure and material engineering methods for optoelectronic devices signal to noise ratio enhancementAPPLIED MATERIALS INC·Filed 2020·Granted Jun 18, 2024·0 cites·9 claims
- 0951US8822312B2Method of forming high growth rate, low resistivity germanium film on silicon substrateHUANG YI-CHIAU·Filed 2012·Granted Sep 2, 2014·0 cites·19 claims
- 1051US8759201B2Method of forming high growth rate, low resistivity germanium film on silicon substrateHUANG YI-CHIAU·Filed 2012·Granted Jun 24, 2014·0 cites·20 claims
- 1138US2003207547A1Silicon deposition process in resistively heated single wafer chamberFiled 2003·Application pending·0 cites
- 1234US2002197793A1Low thermal budget metal oxide deposition for capacitor structuresFiled 2001·Application pending·0 cites
- 1333US2004009680A1Seedless method of forming a silicon germanium layer on a gate dielectric layerAPPLIED MATERIALS INC·Filed 2002·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →