Inventor · disambiguated record
Yan Wang
Also filed as: WANG YAN · Wang yan-ru
10 granted patents·2 pending applications·59 citations·filing 2009–2025
87Inventor score
Files withGLOBALFOUNDRIES INC5ALPINE ELECTRONICS INC1BOMDIC INC1BYTEDANCE TECH LTD1FULIAN PREC ELECTRONICS TIANJIN CO LTD1
Top patents by PatentIndex Score
12 records- 0192US10147714B2Method, apparatus, and system for two-dimensional power rail to enable scaling of a standard cellGLOBALFOUNDRIES INC·Filed 2016·Granted Dec 4, 2018·9 cites·20 claims
- 0292US9727685B2Method, apparatus, and system for improved standard cell design and routing for improving standard cell routabilityGLOBALFOUNDRIES INC·Filed 2015·Granted Aug 8, 2017·10 cites·19 claims
- 0392US8679911B2Cross-coupling-based design using diffusion contact structuresWANG YAN·Filed 2012·Granted Mar 25, 2014·14 cites·12 claims
- 0491US9679809B1Method of forming self aligned continuity blocks for mandrel and non-mandrel interconnect linesGLOBALFOUNDRIES INC·Filed 2016·Granted Jun 13, 2017·8 cites·15 claims
- 0587US9472464B1Methods to utilize merged spacers for use in fin generation in tapered IC devicesGLOBALFOUNDRIES INC·Filed 2016·Granted Oct 18, 2016·5 cites·20 claims
- 0687US9159724B2Cross-coupling-based design using diffusion contact structuresGLOBALFOUNDRIES INC·Filed 2014·Granted Oct 13, 2015·8 cites·20 claims
- 0767US12033673B2Method of data clearing of hard disk, apparatus, and computer readable storage medium applying the methodFULIAN PREC ELECTRONICS TIANJIN CO LTD·Filed 2023·Granted Jul 9, 2024·0 cites·19 claims
- 0862US8346560B2Dialog design apparatus and methodALPINE ELECTRONICS INC·Filed 2009·Granted Jan 1, 2013·3 cites·16 claims
- 0958US8798999B2Dialog design tool and methodOZKARAGOZ INCI·Filed 2011·Granted Aug 5, 2014·2 cites·17 claims
- 1053US2025005792A1Posture comparison method, electronic device, and computer-readable storage mediumBOMDIC INC·Filed 2024·Application pending·0 cites
- 1149US2025210138A1Method, device and medium for conformation generation optimizationBYTEDANCE TECH LTD·Filed 2025·Application pending·0 cites
- 1248US8689154B2Providing timing-closed FinFET designs from planar designsRASHED MAHBUB·Filed 2012·Granted Apr 1, 2014·0 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →