Inventor · disambiguated record
Yanhua Yi
Also filed as: YI YANHUA
8 granted patents·1 pending application·35 citations·filing 2007–2023
81Inventor score
Top patents by PatentIndex Score
9 records- 0191US11966677B1Emulation performance analysis using abstract timing graph representationSYNOPSYS INC·Filed 2021·Granted Apr 23, 2024·6 cites·20 claims
- 0287US7757198B1Scan chain systems and methods for programmable logic devicesLATTICE SEMICONDUCTOR CORP·Filed 2007·Granted Jul 13, 2010·17 cites·14 claims
- 0372US12140628B2Integrating machine learning delay estimation in FPGA-based emulation systemsSYNOPSYS INC·Filed 2023·Granted Nov 12, 2024·0 cites·20 claims
- 0472US8181139B1Multi-priority placement for configuring programmable logic devicesCHEN XIAOTAO·Filed 2008·Granted May 15, 2012·10 cites·10 claims
- 0570US11860227B2Machine learning delay estimation for emulation systemsSYNOPSYS INC·Filed 2021·Granted Jan 2, 2024·0 cites·20 claims
- 0664US9672307B2Clock placement for programmable logic devicesLATTICE SEMICONDUCTOR CORP·Filed 2015·Granted Jun 6, 2017·1 cites·21 claims
- 0761US9390220B2Bus-based clock to out path optimizationLATTICE SEMICONDUCTOR CORP·Filed 2014·Granted Jul 12, 2016·1 cites·19 claims
- 0851US9330217B2Holdtime correction using input/output block delayLATTICE SEMICONDUCTOR CORP·Filed 2014·Granted May 3, 2016·0 cites·18 claims
- 0946US2016026745A1Clock to out path optimizationLATTICE SEMICONDUCTOR CORP·Filed 2014·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →