Inventor · disambiguated record
Yasuaki Yonemochi
Also filed as: YONEMOCHI YASUAKI
7 granted patents·3 pending applications·66 citations·filing 2006–2021
82Inventor score
Top patents by PatentIndex Score
10 records- 0196US9991280B2Multi-tier three-dimensional memory devices containing annular dielectric spacers within memory openings and methods of making the sameSANDISK TECHNOLOGIES LLC·Filed 2017·Granted Jun 5, 2018·40 cites·15 claims
- 0291US7705392B2Nonvolatile semiconductor device and method of manufacturing nonvolatile semiconductor deviceRENESAS TECH CORP·Filed 2006·Granted Apr 27, 2010·18 cites·4 claims
- 0380US8211777B2Method of manufacturing nonvolatile semiconductor deviceYONEMOCHI YASUAKI·Filed 2010·Granted Jul 3, 2012·5 cites·1 claims
- 0477US9502428B1Sidewall assisted process for wide and narrow line formationSANDISK TECHNOLOGIES INC·Filed 2015·Granted Nov 22, 2016·3 cites·19 claims
- 0559US10748919B2Multi-tier three-dimensional memory devices containing annular dielectric spacers within memory openings and methods of making the sameSANDISK TECHNOLOGIES LLC·Filed 2018·Granted Aug 18, 2020·0 cites·19 claims
- 0655US2010044772A1Nonvolatile semiconductor device and method of manufacturing nonvolatile semiconductor deviceRENESAS TECH CORP·Filed 2009·Application pending·0 cites
- 0751US12200932B2Three-dimensional memory device and method of making the same using differential thinning of vertical channelsSANDISK TECHNOLOGIES LLC·Filed 2021·Granted Jan 14, 2025·0 cites·10 claims
- 0850US8669172B2Method of manufacturing nonvolatile semiconductor deviceYONEMOCHI YASUAKI·Filed 2012·Granted Mar 11, 2014·0 cites·7 claims
- 0941US2008303066A1Semiconductor deviceRENESAS TECH CORP·Filed 2008·Application pending·0 cites
- 1033US2017025426A1Select Gates with Conductive Strips on SidesSANDISK TECHNOLOGIES INC·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →