Inventor · disambiguated record
Yehuda Smooha
Also filed as: SMOOHA YEHUDA
34 granted patents·2 pending applications·824 citations·filing 1990–2017
98Inventor score
Files withAGERE SYSTEMS INC21LUCENT TECHNOLOGIES INC6AGERE SYST GUARDIAN CORP2AT & T BELL LAB2AT & T CORP1
Top patents by PatentIndex Score
36 records- 0194US5751065AIntegrated circuit with active devices under bond padsLUCENT TECHNOLOGIES INC·Filed 1995·Granted May 12, 1998·185 cites·11 claims
- 0292US7145364B2Self-bypassing voltage level translator circuitAGERE SYSTEMS INC·Filed 2005·Granted Dec 5, 2006·21 cites·20 claims
- 0391US7529070B2Power pin to power pin electro-static discharge (ESD) clampAGERE SYSTEMS INC·Filed 2005·Granted May 5, 2009·35 cites·25 claims
- 0490US7382168B2Buffer circuit with multiple voltage rangeAGERE SYSTEMS INC·Filed 2005·Granted Jun 3, 2008·20 cites·19 claims
- 0588US7276957B2Floating well circuit having enhanced latch-up performanceAGERE SYSTEMS INC·Filed 2005·Granted Oct 2, 2007·17 cites·20 claims
- 0687US4990802AESD protection for output buffersAT & T BELL LAB·Filed 1990·Granted Feb 5, 1991·71 cites·6 claims
- 0785US7936209B2I/O buffer with low voltage semiconductor devicesLSI CORP·Filed 2009·Granted May 3, 2011·14 cites·14 claims
- 0883US5965903ADevice and method of manufacture for an integrated circuit having a BIST circuit and bond pads incorporated thereinLUCENT TECHNOLOGIES INC·Filed 1998·Granted Oct 12, 1999·61 cites·21 claims
- 0980US6556409B1Integrated circuit including ESD circuits for a multi-chip module and a method thereforAGERE SYSTEMS INC·Filed 2000·Granted Apr 29, 2003·28 cites·20 claims
- 1080US6503793B1Method for concurrently forming an ESD protection device and a shallow trench isolation regionAGERE SYSTEMS INC·Filed 2001·Granted Jan 7, 2003·27 cites·20 claims
- 1180US6417087B1Process for forming a dual damascene bond pad structure over active circuitryAGERE SYST GUARDIAN CORP·Filed 1999·Granted Jul 9, 2002·60 cites·20 claims
- 1278US6838769B1Dual damascene bond pad structure for lowering stress and allowing circuitry under padsAGERE SYSTEMS INC·Filed 1999·Granted Jan 4, 2005·51 cites·23 claims
- 1376US6384452B1Electrostatic discharge protection device with monolithically formed resistor-capacitor portionAGERE SYST GUARDIAN CORP·Filed 2000·Granted May 7, 2002·23 cites·13 claims
- 1476US5502328ABipolar ESD protection for integrated circuitsAT & T CORP·Filed 1994·Granted Mar 26, 1996·35 cites·3 claims
- 1571US6476472B1Integrated circuit package with improved ESD protection for no-connect pinsAGERE SYSTEMS INC·Filed 2000·Granted Nov 5, 2002·21 cites·9 claims
- 1670US7511550B2Method and apparatus for improving reliability of an integrated circuit having multiple power domainsAGERE SYSTEMS INC·Filed 2006·Granted Mar 31, 2009·4 cites·20 claims
- 1769US8089739B2Electrostatic discharge protection circuitBHATTACHARYA DIPANKAR·Filed 2007·Granted Jan 3, 2012·4 cites·20 claims
- 1866US7495873B2Electrostatic discharge protection in a semiconductor deviceAGERE SYSTEMS INC·Filed 2004·Granted Feb 24, 2009·12 cites·20 claims
- 1965US5969421AIntegrated circuit conductors that avoid current crowdingLUCENT TECHNOLOGIES INC·Filed 1997·Granted Oct 19, 1999·31 cites·9 claims
- 2065US5304839ABipolar ESD protection for integrated circuitsAT & T BELL LAB·Filed 1992·Granted Apr 19, 1994·22 cites·3 claims
- 2163US6534834B1Polysilicon bounded snapback deviceAGERE SYSTEMS INC·Filed 2001·Granted Mar 18, 2003·11 cites·21 claims
- 2261US5838033AIntegrated circuit with gate conductor defined resistorLUCENT TECHNOLOGIES INC·Filed 1993·Granted Nov 17, 1998·20 cites·6 claims
- 2359US7626845B2Voltage programming switch for one-time-programmable (OTP) memoriesAGERE SYSTEMS INC·Filed 2006·Granted Dec 1, 2009·4 cites·41 claims
- 2459US7034653B2Semiconductor resistorAGERE SYSTEMS INC·Filed 2004·Granted Apr 25, 2006·9 cites·17 claims
- 2557US7002372B2Moderate current 5V tolerant buffer using a 2.5 volt power supplyAGERE SYSTEMS INC·Filed 2004·Granted Feb 21, 2006·7 cites·26 claims
- 2653US7569445B2Semiconductor device with constricted current passageAGERE SYSTEMS INC·Filed 2007·Granted Aug 4, 2009·0 cites·8 claims
- 2750US7529071B2Circuit for selectively bypassing a capacitive elementAGERE SYSTEMS INC·Filed 2006·Granted May 5, 2009·1 cites·19 claims
- 2847US6136620AMethod of manufacture for an integrated circuit having a BIST circuit and bond pads incorporated thereinLUCENT TECHNOLOGIES INC·Filed 1999·Granted Oct 24, 2000·11 cites·11 claims
- 2946US7573691B2Electrical over stress robustnessAGERE SYSTEMS INC·Filed 2004·Granted Aug 11, 2009·3 cites·13 claims
- 3046US7429703B2Methods and apparatus for integrated circuit device power distribution via internal wire bondsAGERE SYSTEMS INC·Filed 2003·Granted Sep 30, 2008·3 cites·20 claims
- 3143US6977524B2High current 5V tolerant buffer using a 2.5 volt power supplyAGERE SYSTEMS INC·Filed 2004·Granted Dec 20, 2005·2 cites·20 claims
- 3242US5895960AThin oxide mask level defined resistorLUCENT TECHNOLOGIES INC·Filed 1997·Granted Apr 20, 1999·11 cites·7 claims
- 3341US7329926B2Semiconductor device with constricted current passageAGERE SYSTEMS INC·Filed 2003·Granted Feb 12, 2008·0 cites·12 claims
- 3437US10763205B2Input/output cell wire connectorSEAGATE TECHNOLOGY LLC·Filed 2017·Granted Sep 1, 2020·0 cites·13 claims
- 3537US2008122474A1Systems and methods for reducing the effects of electrostatic dischargeAGERE SYSTEMS INC·Filed 2006·Application pending·0 cites
- 3626US2014040847A1System and method for generating physical deterministic boundary interconnect features for dual patterning technologiesMILINICHIK JOHN A·Filed 2012·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →