Electrical over stress robustness

Abstract

Protection is provided against electrical surges resulting from Electrical Over Stress conditions, e.g., when interfacing circuits with powered connections. An EOS shunt is activated for as long as the EOS condition exists. EOS protection using an EOS shunt in accordance with the principles of the present invention remains activated by a voltage threshold trigger as long as necessary. In a disclosed embodiment, an EOS shunt includes a voltage threshold detector that detects a voltage on a power bus with respect to a ground rail exceeding a predetermined amount, e.g., 5 volts in a device powered at 3.3 volts. During the EOS event, a path between power and ground comprising a transistor is turned on.

1. Circuitry including an electrical over stress (EOS) shunt connected between a first rail and a second rail of the circuitry, the EOS shunt comprising:
 a switchable low-resistance path connected between the first and second rails; and 
 a voltage threshold detector comprising a plurality of series-connected diodes connected in series with a resistor between the first and second rails, wherein:
 the voltage threshold detector is coupled to turn on and off the switchable low-resistance path based on relative voltage levels of the first and second rails; 
 the voltage threshold detector further comprises at least one switch connected to selectively bypass at least one of the series-connected diodes; and 
 the resistor is a programmable resistor whose resistance can be selectively changed when the at least one series-connected diode is bypassed. 
 
 
   
   
     2. The circuitry of  claim 1 , wherein:
 the first rail is a power rail; and 
 the second rail is a ground rail. 
 
   
   
     3. The circuitry of  claim 1 , wherein the circuitry is implemented in a single integrated circuit. 
   
   
     4. The circuitry of  claim 1 , further comprising an electrostatic discharge (ESD) shunt connected between the first and second rails in parallel with the EOS shunt, wherein:
 the ESD shunt is designed to protect the circuitry from ESD events; and 
 the EOS shunt is designed to protect the circuitry from EOS events having durations longer than the ESD events. 
 
   
   
     5. The circuitry of  claim 1 , wherein bypassing one or more of the series-connected diodes changes the relative voltage levels at which the switchable low-resistance path is turned on. 
   
   
     6. The circuitry of  claim 1 , wherein the voltage threshold detector comprises at least two switches connected to selectively bypass up to at least two of the series-connected diodes. 
   
   
     7. The circuitry of  claim 1 , wherein the EOS shunt further comprises a driver connected between the voltage threshold detector and the switchable low-resistance path. 
   
   
     8. The circuitry of  claim 7 , wherein the driver comprises one or more series-connected inverters. 
   
   
     9. The circuitry of  claim 1 , wherein the switchable low-resistance path comprises a transistor whose channel is connected between the first and second rails and whose gate is coupled to the voltage threshold detector. 
   
   
     10. The circuitry of  claim 1 , further comprising a Firewire IEEE 1394 interface. 
   
   
     11. The circuitry of  claim 1 , wherein:
 the first rail is a power rail; 
 the second rail is a ground rail; 
 the circuitry is implemented in a single integrated circuit; 
 the circuitry further comprises an ESD shunt connected between the first and second rails in parallel with the EOS shunt, wherein:
 the ESD shunt is designed to protect the circuitry from ESD events; and 
 the EOS shunt is designed to protect the circuitry from EOS events having durations longer than the ESD events; 
 
 bypassing one or more of the series-connected diodes changes the relative voltage levels at which the switchable low-resistance path is turned on; 
 the EOS shunt further comprises a driver connected between the voltage threshold detector and the switchable low-resistance path, wherein the driver comprises one or more series-connected inverters; and 
 the switchable low-resistance path comprises a transistor whose channel is connected between the first and second rails and whose gate is coupled to the voltage threshold detector. 
 
   
   
     12. The circuitry of  claim 11 , wherein the voltage threshold detector comprises at least two switches connected to selectively bypass up to at least two of the series-connected diodes. 
   
   
     13. The circuitry of  claim 11 , further comprising a Firewire IEEE 1394 interface.