Inventor · disambiguated record
Yung Fu Chong
Also filed as: CHONG YUNG F · CHONG YUNG FU · CHONG YUNG FU ALFRED
50 granted patents·14 pending applications·666 citations·filing 2000–2024
98Inventor score
Files withCHARTERED SEMICONDUCTOR MFG23GLOBALFOUNDRIES SG PTE LTD20IBM8CHONG YUNG FU3INFINEON TECHNOLOGIES AG2
Top patents by PatentIndex Score
64 records- 0196US7718500B2Formation of raised source/drain structures in NFET with embedded SiGe in PFETCHARTERED SEMICONDUCTOR MFG·Filed 2005·Granted May 18, 2010·53 cites·22 claims
- 0295US8017487B2Method to control source/drain stressor profiles for stress engineeringGLOBALFOUNDRIES SG PTE LTD·Filed 2006·Granted Sep 13, 2011·37 cites·21 claims
- 0395US7405131B2Method and structure to prevent silicide strapping of source/drain to body in semiconductor devices with source/drain stressorCHARTERED SEMICONDUCTOR MFG·Filed 2005·Granted Jul 29, 2008·45 cites·26 claims
- 0493US8450775B2Method to control source/drain stressor profiles for stress engineeringCHONG YUNG FU·Filed 2011·Granted May 28, 2013·18 cites·20 claims
- 0593US7413961B2Method of fabricating a transistor structureCHARTERED SEMICONDUCTOR MFG·Filed 2006·Granted Aug 19, 2008·22 cites·22 claims
- 0692US7939413B2Embedded stressor structure and processSAMSUNG ELECTRONICS CO LTD·Filed 2005·Granted May 10, 2011·27 cites·27 claims
- 0792US6365446B1Formation of silicided ultra-shallow junctions using implant through metal technology and laser annealing processCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Apr 2, 2002·55 cites·24 claims
- 0891US7572712B2Method to form selective strained Si using lateral epitaxyCHARTERED SEMICONDUCTOR MFG·Filed 2006·Granted Aug 11, 2009·19 cites·32 claims
- 0991US7442618B2Method to engineer etch profiles in Si substrate for advanced semiconductor devicesCHARTERED SEMICONDUCTOR MFG·Filed 2005·Granted Oct 28, 2008·22 cites·21 claims
- 1091US6391731B1Activating source and drain junctions and extensions using a single laser annealCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted May 21, 2002·59 cites·4 claims
- 1190US8288825B2Formation of raised source/drain structures in NFET with embedded SiGe in PFETCHONG YUNG FU·Filed 2010·Granted Oct 16, 2012·13 cites·24 claims
- 1289US8324031B2Diffusion barrier and method of formation thereofTAN SHYUE SENG·Filed 2008·Granted Dec 4, 2012·10 cites·7 claims
- 1389US8211761B2Semiconductor system using germanium condensationTAN SHYUE SENG·Filed 2006·Granted Jul 3, 2012·17 cites·13 claims
- 1489US7485524B2MOSFETs comprising source/drain regions with slanted upper surfaces, and method for fabricating the sameIBM·Filed 2006·Granted Feb 3, 2009·17 cites·1 claims
- 1588US7482656B2Method and structure to form self-aligned selective-SOIIBM·Filed 2006·Granted Jan 27, 2009·15 cites·18 claims
- 1687US6335253B1Method to form MOS transistors with shallow junctions using laser annealingCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Jan 1, 2002·49 cites·13 claims
- 1786US7256112B2Laser activation of implanted contact plug for memory bitline fabricationCHARTERED SEMICONDUCTOR MFG·Filed 2005·Granted Aug 14, 2007·15 cites·17 claims
- 1885US9257554B2Split gate embedded memory technology and method of manufacturing thereofGLOBALFOUNDRIES SG PTE LTD·Filed 2014·Granted Feb 9, 2016·7 cites·21 claims
- 1983US7442619B2Method of forming substantially L-shaped silicide contact for a semiconductor deviceIBM·Filed 2006·Granted Oct 28, 2008·9 cites·2 claims
- 2083US6624489B2Formation of silicided shallow junctions using implant through metal technology and laser annealing processCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Sep 23, 2003·25 cites·6 claims
- 2181US12142673B2Transistor with wrap-around extrinsic baseGLOBALFOUNDRIES SG PTE LTD·Filed 2023·Granted Nov 12, 2024·0 cites·20 claims
- 2279US2025006824A1Transistor with wrap-around extrinsic baseGLOBALFOUNDRIES SG PTE LTD·Filed 2024·Application pending·0 cites
- 2378US6534390B1Salicide method for producing a semiconductor device using silicon/amorphous silicon/metal structureCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Mar 18, 2003·21 cites·26 claims
- 2477US7800182B2Semiconductor devices having pFET with SiGe gate electrode and embedded SiGe source/drain regions and methods of making the sameINFINEON TECHNOLOGIES AG·Filed 2006·Granted Sep 21, 2010·6 cites·17 claims
- 2576US7692213B2Integrated circuit system employing a condensation processCHARTERED SEMICONDUCTOR MFG·Filed 2007·Granted Apr 6, 2010·6 cites·18 claims
- 2676US7566609B2Method of manufacturing a semiconductor structureIBM·Filed 2005·Granted Jul 28, 2009·6 cites·13 claims
- 2775US6387784B1Method to reduce polysilicon depletion in MOS transistorsCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted May 14, 2002·22 cites·25 claims
- 2873US11855196B2Transistor with wrap-around extrinsic baseGLOBALFOUNDRIES SG PTE LTD·Filed 2021·Granted Dec 26, 2023·0 cites·20 claims
- 2972US9620418B2Methods for fabricating integrated circuits with improved active regionsGLOBALFOUNDRIES SG PTE LTD·Filed 2014·Granted Apr 11, 2017·3 cites·17 claims
- 3072US6566650B1Incorporation of dielectric layer onto SThM tips for direct thermal analysisCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted May 20, 2003·25 cites·18 claims
- 3167US10079316B2Split gate embedded memory technology and method of manufacturing thereofGLOBALFOUNDRIES SG PTE LTD·Filed 2016·Granted Sep 18, 2018·1 cites·21 claims
- 3267US8912567B2Strained channel transistor and method of fabrication thereofCHONG YUNG FU·Filed 2010·Granted Dec 16, 2014·2 cites·39 claims
- 3367US7972921B2Integrated circuit isolation systemGLOBALFOUNDRIES SG PTE LTD·Filed 2006·Granted Jul 5, 2011·3 cites·10 claims
- 3465US7645687B2Method to fabricate variable work function gates for FUSI devicesCHARTERED SEMICONDUCTOR MFG·Filed 2005·Granted Jan 12, 2010·5 cites·33 claims
- 3565US6566215B1Method of fabricating short channel MOS transistors with source/drain extensionsCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted May 20, 2003·12 cites·25 claims
- 3664US7772071B2Strained channel transistor and method of fabrication thereofCHARTERED SEMICONDUCTOR MFG·Filed 2006·Granted Aug 10, 2010·2 cites·40 claims
- 3761US11776844B2Contact via structures of semiconductor devicesGLOBALFOUNDRIES SG PTE LTD·Filed 2021·Granted Oct 3, 2023·0 cites·11 claims
- 3861US8017472B2CMOS devices having stress-altering material lining the isolation trenches and methods of manufacturing thereofINFINEON TECHNOLOGIES AG·Filed 2006·Granted Sep 13, 2011·2 cites·31 claims
- 3960US6734072B1Method of fabricating a MOSFET device using a spike rapid thermal oxidation procedureCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted May 11, 2004·9 cites·24 claims
- 4059US8138055B2Semiconductor devices having pFET with SiGe gate electrode and embedded SiGe source/drain regions and methods of making the sameHAN JIN-PING·Filed 2010·Granted Mar 20, 2012·1 cites·23 claims
- 4159US7892905B2Formation of strained Si channel and Si1-xGex source/drain structures using laser annealingGLOBALFOUNDRIES SG PTE LTD·Filed 2005·Granted Feb 22, 2011·2 cites·40 claims
- 4258US11855195B2Transistor with wrap-around extrinsic baseGLOBALFOUNDRIES SG PTE LTD·Filed 2021·Granted Dec 26, 2023·0 cites·17 claims
- 4357US2015008528A1Diffusion barrier and method of formation thereofGLOBALFOUNDRIES SG PTE LTD·Filed 2014·Application pending·0 cites
- 4454US12500119B2Air gap with inverted T-shaped lower portion extending through at least one metal layer, and related methodGLOBALFOUNDRIES SG PTE LTD·Filed 2022·Granted Dec 16, 2025·0 cites·20 claims
- 4553US2013087889A1Diffusion barrier and method of formation thereofGLOBALFOUNDRIES SG PTE LTD·Filed 2012·Application pending·0 cites
- 4652US9390962B1Methods for fabricating device substrates and integrated circuitsGLOBALFOUNDRIES SG PTE LTD·Filed 2015·Granted Jul 12, 2016·1 cites·20 claims
- 4752US8643119B2Substantially L-shaped silicide for contactLUO ZHIJIONG·Filed 2008·Granted Feb 4, 2014·0 cites·6 claims
- 4852US2025081556A1Field-effect transistors with an asymmetric defect regionGLOBALFOUNDRIES SG PTE LTD·Filed 2023·Application pending·0 cites
- 4950US7888224B2Method for forming a shallow junction region using defect engineering and laser annealingUNIV NANYANG TECH·Filed 2008·Granted Feb 15, 2011·0 cites·20 claims
- 5049US2008286916A1Methods of stressing transistor channel with replaced gateLUO ZHIJIONG·Filed 2008·Application pending·0 cites
Showing the top 50 of 64 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →