Inventor · disambiguated record
Yuanlong Wang
Also filed as: WANG YUANLONG
44 granted patents·10 pending applications·690 citations·filing 1998–2025
98Inventor score
Files withRAMBUS INC29NOREL SYSTEMS LTD12CONEXANT SYSTEMS INC4UNIV PEKING FOUNDER GROUP CO3WANG YUANLONG2
Top patents by PatentIndex Score
54 records- 0199US7656321B2Signaling systemRAMBUS INC·Filed 2005·Granted Feb 2, 2010·187 cites·28 claims
- 0298US7882423B2Unidirectional error code transfer for both read and write data transmitted via bidirectional data linkRAMBUS INC·Filed 2009·Granted Feb 1, 2011·41 cites·12 claims
- 0397US11340973B2Controller that receives a cyclic redundancy check (CRC) code for both read and write data transmitted via bidirectional data linkRAMBUS INC·Filed 2020·Granted May 24, 2022·3 cites·20 claims
- 0497US7831888B2Unidirectional error code transfer method for a bidirectional data linkRAMBUS INC·Filed 2009·Granted Nov 9, 2010·31 cites·29 claims
- 0596US10838793B2Memory device with unidirectional error detection code transfer for both read and write data transmitted via bidirectional data linkRAMBUS INC·Filed 2019·Granted Nov 17, 2020·6 cites·20 claims
- 0695US9721630B2Strobe acquisition and trackingRAMBUS INC·Filed 2016·Granted Aug 1, 2017·13 cites·20 claims
- 0795US8656254B2Unidirectional error code transfer for both read and write data transmitted via bidirectional data linkWANG YUANLONG·Filed 2013·Granted Feb 18, 2014·18 cites·20 claims
- 0895US7836378B2System to detect and identify errors in control information, read data and/or write dataRAMBUS INC·Filed 2008·Granted Nov 16, 2010·39 cites·41 claims
- 0994US8365042B2Unidirectional error code transfer for both read and write data transmitted via bidirectional data linkRAMBUS INC·Filed 2012·Granted Jan 29, 2013·11 cites·35 claims
- 1093US8504788B2Memory controller, system and method for read signal timing calibrationSTOTT BRET·Filed 2007·Granted Aug 6, 2013·30 cites·29 claims
- 1192US10241849B2Controller that receives a cyclic redundancy check (CRC) code for both read and write data transmitted via bidirectional data linkRAMBUS INC·Filed 2018·Granted Mar 26, 2019·3 cites·20 claims
- 1292US9875151B2Controller that receives a cyclic redundancy check (CRC) code from an electrically erasable programmable memory deviceRAMBUS INC·Filed 2016·Granted Jan 23, 2018·4 cites·20 claims
- 1391US9477547B2Controller device with retransmission upon errorRAMBUS INC·Filed 2015·Granted Oct 25, 2016·4 cites·20 claims
- 1490US9298543B2Electrically erasable programmable memory device that generates error-detection informationRAMBUS INC·Filed 2015·Granted Mar 29, 2016·3 cites·20 claims
- 1590US9257163B2Strobe acquisition and trackingRAMBUS INC·Filed 2013·Granted Feb 9, 2016·8 cites·20 claims
- 1689US10180865B2Memory device with unidirectional cyclic redundancy check (CRC) code transfer for both read and write data transmitted via bidirectional data linkRAMBUS INC·Filed 2017·Granted Jan 15, 2019·3 cites·20 claims
- 1788US11238003B2Interface clock managementRAMBUS INC·Filed 2020·Granted Feb 1, 2022·2 cites·20 claims
- 1888US6466825B1Method and apparatus for address transfers, system serialization, and centralized cache and transaction control, in a symetric multiprocessor systemCONEXANT SYSTEMS INC·Filed 2001·Granted Oct 15, 2002·57 cites·20 claims
- 1986US12253903B2Remedial action indicationRAMBUS INC·Filed 2023·Granted Mar 18, 2025·0 cites·20 claims
- 2086US11062748B2Strobe acquisition and trackingRAMBUS INC·Filed 2019·Granted Jul 13, 2021·2 cites·20 claims
- 2185US6292705B1Method and apparatus for address transfers, system serialization, and centralized cache and transaction control, in a symetric multiprocessor systemCONEXANT SYSTEMS INC·Filed 1998·Granted Sep 18, 2001·120 cites·20 claims
- 2284US12346283B2Interface clock managementRAMBUS INC·Filed 2024·Granted Jul 1, 2025·0 cites·20 claims
- 2382US11669379B2Controller that receives a cyclic redundancy check (CRC) code for both read and write data transmitted via bidirectional data linkRAMBUS INC·Filed 2022·Granted Jun 6, 2023·0 cites·20 claims
- 2482US10339990B2Strobe acquisition and trackingRAMBUS INC·Filed 2017·Granted Jul 2, 2019·3 cites·20 claims
- 2581US12032508B2Interface clock managementRAMBUS INC·Filed 2023·Granted Jul 9, 2024·0 cites·20 claims
- 2680US2025245083A1Controller that receives a cyclic redundancy check (crc) code for both read and write data transmitted via bidirectional data linkRAMBUS INC·Filed 2025·Application pending·0 cites
- 2779US9262262B2Memory device with retransmission upon errorRAMBUS INC·Filed 2015·Granted Feb 16, 2016·1 cites·20 claims
- 2877US11681648B2Interface clock managementRAMBUS INC·Filed 2021·Granted Jun 20, 2023·0 cites·20 claims
- 2976US9092352B2Memory controller with write data error detection and remediationRAMBUS INC·Filed 2014·Granted Jul 28, 2015·1 cites·19 claims
- 3073US11790962B2Strobe acquisition and trackingRAMBUS INC·Filed 2021·Granted Oct 17, 2023·0 cites·20 claims
- 3173US9824056B2Handshake signaling for interface clock managementWANG YUANLONG·Filed 2010·Granted Nov 21, 2017·2 cites·32 claims
- 3272US6516442B1Channel interface and protocols for cache coherency in a scalable symmetric multiprocessor systemCONEXANT SYSTEMS INC·Filed 1999·Granted Feb 4, 2003·74 cites·44 claims
- 3369US7028134B2Crossbar integrated circuit with parallel channels for a communication deviceCONEXANT SYSTEMS INC·Filed 2000·Granted Apr 11, 2006·9 cites·20 claims
- 3468US7142555B2Method and apparatus for switching data using parallel switching elementsMINDSPEED TECH INC·Filed 2002·Granted Nov 28, 2006·12 cites·20 claims
- 3567US10671135B2Intelligent mobile power supply and method for USB data communication therewithNOREL SYSTEMS LTD·Filed 2018·Granted Jun 2, 2020·1 cites·25 claims
- 3666US9262269B2System and module comprising an electrically erasable programmable memory chipRAMBUS INC·Filed 2015·Granted Feb 16, 2016·0 cites·19 claims
- 3766US9213591B1Electrically erasable programmable memory device that generates a cyclic redundancy check (CRC) codeRAMBUS INC·Filed 2015·Granted Dec 15, 2015·0 cites·20 claims
- 3862US10558608B2Interface clock managementRAMBUS INC·Filed 2017·Granted Feb 11, 2020·0 cites·20 claims
- 3958US2025061080A1I2c interface system, data writing method and data reading methodNOREL SYSTEMS LTD·Filed 2024·Application pending·0 cites
- 4056US10615622B2Charging detection and control apparatusNOREL SYSTEMS LTD·Filed 2017·Granted Apr 7, 2020·1 cites·16 claims
- 4153US10289623B2Method and system for key knowledge point recommendationUNIV PEKING FOUNDER GROUP CO·Filed 2013·Granted May 14, 2019·1 cites·23 claims
- 4252US12160330B2Multi-rate bidirectional transmission systemNOREL SYSTEMS LTD·Filed 2023·Granted Dec 3, 2024·0 cites·6 claims
- 4351US2023379085A1Method for controlling retransmission in physical layerNOREL SYSTEMS LTD·Filed 2023·Application pending·0 cites
- 4451US2024334023A1Video transmission system with physical layer retransmission and real-time transmission functionsNOREL SYSTEMS LTD·Filed 2024·Application pending·0 cites
- 4546US10366143B2Method and system for selecting encoding format for reading target documentUNIV PEKING FOUNDER GROUP CO·Filed 2013·Granted Jul 30, 2019·0 cites·16 claims
- 4645US11321266B2Dual-mode USB deviceNOREL SYSTEMS LTD·Filed 2020·Granted May 3, 2022·0 cites·13 claims
- 4743US2004083326A1Switch scheduling algorithmFiled 2002·Application pending·0 cites
- 4843US2020166980A1Intelligent storage device and method for accessing intelligent storage deviceNOREL SYSTEMS LTD·Filed 2019·Application pending·0 cites
- 4942US9658958B2Control apparatus and control method with multiple flash memory card channelsNOREL SYSTEMS LTD·Filed 2013·Granted May 23, 2017·0 cites·46 claims
- 5041US2020026676A1Usb expansion function deviceNOREL SYSTEMS LTD·Filed 2019·Application pending·0 cites
Showing the top 50 of 54 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →