Inventor · disambiguated record
Zeev Offen
Also filed as: OFFEN ZEEV
27 granted patents·2 pending applications·103 citations·filing 2000–2024
95Inventor score
Top patents by PatentIndex Score
29 records- 0196US9996135B2Controlling operating voltage of a processorINTEL CORP·Filed 2016·Granted Jun 12, 2018·12 cites·20 claims
- 0295US11822409B2Controlling operating frequency of a processorDAEDALUS PRIME LLC·Filed 2022·Granted Nov 21, 2023·2 cites·20 claims
- 0395US11507167B2Controlling operating voltage of a processorDAEDALUS PRIME LLC·Filed 2021·Granted Nov 22, 2022·3 cites·21 claims
- 0495US10394300B2Controlling operating voltage of a processorINTEL CORP·Filed 2018·Granted Aug 27, 2019·10 cites·19 claims
- 0595US9367114B2Controlling operating voltage of a processorINTEL CORP·Filed 2013·Granted Jun 14, 2016·19 cites·16 claims
- 0692US11175712B2Controlling operating voltage of a processorINTEL CORP·Filed 2019·Granted Nov 16, 2021·3 cites·20 claims
- 0790US9250901B2Execution context swap between heterogeneous functional hardware unitsSODHI INDER M·Filed 2013·Granted Feb 2, 2016·15 cites·25 claims
- 0882US12339723B2Controlling operating voltage of a processorDAEDALUS PRIME LLC·Filed 2023·Granted Jun 24, 2025·0 cites·13 claims
- 0977US6570573B1Method and apparatus for pre-fetching vertex buffers in a computer systemINTEL CORP·Filed 2000·Granted May 27, 2003·17 cites·33 claims
- 1076US9081687B2Method and apparatus for MONITOR and MWAIT in a distributed cache architectureOFFEN ZEEV·Filed 2007·Granted Jul 14, 2015·8 cites·17 claims
- 1176US8643660B2Technique to share information among different cache coherency domainsOFFEN ZEEV·Filed 2012·Granted Feb 4, 2014·2 cites·8 claims
- 1273US9395784B2Independently controlling frequency of plurality of power domains in a processor systemINTEL CORP·Filed 2013·Granted Jul 19, 2016·3 cites·20 claims
- 1367US8347035B2Posting weakly ordered transactionsINTEL CORP·Filed 2008·Granted Jan 1, 2013·4 cites·20 claims
- 1466US9239789B2Method and apparatus for monitor and MWAIT in a distributed cache architectureINTEL CORP·Filed 2015·Granted Jan 19, 2016·1 cites·20 claims
- 1563US10204051B2Technique to share information among different cache coherency domainsINTEL CORP·Filed 2016·Granted Feb 12, 2019·0 cites·23 claims
- 1663US10078590B2Technique to share information among different cache coherency domainsINTEL CORP·Filed 2016·Granted Sep 18, 2018·0 cites·21 claims
- 1763US9946650B2Technique to share information among different cache coherency domainsINTEL CORP·Filed 2016·Granted Apr 17, 2018·0 cites·24 claims
- 1863US9898298B2Context save and restoreINTEL CORP·Filed 2013·Granted Feb 20, 2018·1 cites·13 claims
- 1960US9665488B2Technique to share information among different cache coherency domainsINTEL CORP·Filed 2014·Granted May 30, 2017·0 cites·16 claims
- 2059US9035962B2Technique to share information among different cache coherency domainsINTEL CORP·Filed 2013·Granted May 19, 2015·0 cites·7 claims
- 2157US2025307033A1Apparatus and method including scheduling support circuitry for scheduling tasks on an efficiency cluster for improved performanceINTEL CORP·Filed 2024·Application pending·0 cites
- 2256US9035960B2Technique to share information among different cache coherency domainsOFFEN ZEEV·Filed 2012·Granted May 19, 2015·0 cites·20 claims
- 2354US9035959B2Technique to share information among different cache coherency domainsOFFEN ZEEV·Filed 2008·Granted May 19, 2015·0 cites·25 claims
- 2454US7290179B2System and method for soft error handlingINTEL CORP·Filed 2003·Granted Oct 30, 2007·3 cites·16 claims
- 2553US10401928B2Interface for communication between circuit blocks of an integrated circuit, and associated apparatuses, systems, and methodsINTEL CORP·Filed 2017·Granted Sep 3, 2019·0 cites·25 claims
- 2651US9594413B2Interface for communication between circuit blocks of an integrated circuit, and associated apparatuses, systems, and methodsINTEL CORP·Filed 2013·Granted Mar 14, 2017·0 cites·16 claims
- 2750US2025218485A1Device, method and system to throttle circuit operations based on a requested memory refresh rateINTEL CORP·Filed 2023·Application pending·0 cites
- 2846US8954771B2Split deep power down of I/O moduleSODHI INDER M·Filed 2011·Granted Feb 10, 2015·0 cites·18 claims
- 2945US8151061B2Ensuring coherence between graphics and display domainsFARRELL ROBERT L·Filed 2009·Granted Apr 3, 2012·0 cites·22 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →