Inventor · name-matched record
RAWAT HARSH
1 granted patent·9 pending applications·0 citations·filing 2023–2025
1Inventor score
Files withST MICROELECTRONICS INT NV10
This identity is grouped by exact name match (no disambiguated inventor record was available for these filings) — it may combine same-named inventors.
Top patents by PatentIndex Score
10 records- 0183US2026065976A1Enhanced accuracy of bit line reading for an in-memory compute operation by accounting for variation in read currentST MICROELECTRONICS INT NV·Filed 2025·Application pending·0 cites
- 0283US2026065975A1Bit line read current mirroring circuit for an in-memory compute operation where simultaneous access is made to plural rows of a static random access memory (sram)ST MICROELECTRONICS INT NV·Filed 2025·Application pending·0 cites
- 0380US2026018228A1At-speed transition fault testing for a multi-port and multi-clock memoryST MICROELECTRONICS INT NV·Filed 2025·Application pending·0 cites
- 0467US2026066028A1Shadow logic on output, at speed test (memory bypass) architecture for memories without input dataST MICROELECTRONICS INT NV·Filed 2025·Application pending·0 cites
- 0566US2026066023A1Hybrid built-in system test switching circuitry for embedded memory testingST MICROELECTRONICS INT NV·Filed 2025·Application pending·0 cites
- 0663US2026086976A1Shared communications resource in a multi-tile in-memory computation (imc) neural processing unit (npu)ST MICROELECTRONICS INT NV·Filed 2025·Application pending·0 cites
- 0763US2026031140A1Randomized sequence for row and/or column addressing in a digital in-memory computation processing systemST MICROELECTRONICS INT NV·Filed 2025·Application pending·0 cites
- 0862US2026050412A1Dynamic bit precision control for an in-memory computation processing systemST MICROELECTRONICS INT NV·Filed 2025·Application pending·0 cites
- 0958US2026031139A1Memory architecture with a digital in-memory computation processing mode and a column multiplexing memory access modeST MICROELECTRONICS INT NV·Filed 2025·Application pending·0 cites
- 1045US12584961B2Built-in self test circuit for segmented static random access memory (SRAM) array input/outputST MICROELECTRONICS INT NV·Filed 2023·Granted Mar 24, 2026·0 cites·19 claims
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Identity basis: exact name match across USPTO filings. How scoring works →