Autonomous C-state algorithm and computational engine alignment for improved processor power efficiency

Abstract

Methods and apparatus relating to autonomous C state mechanism and computational engine alignment for improved processor power efficiency. are described. An embodiment determines whether a semiconductor package should enter a package C state based on energy consumption values for entry into and exit from the package C state, an amount of time the semiconductor package stayed in the package C state previously, and one or more breakeven time points between the various package C states. Another embodiment detects a delay by an imaging computational unit of a processor to enter a low power consumption state relative to one or more other computational units of the processor. The logic causes the imaging computational unit to enter the low power consumption state in response to detection of the delay. Other embodiments are also disclosed and claimed.

The invention claimed is: 
     
       1. An apparatus comprising:
 logic, at least a portion of which is in hardware, to determine whether a semiconductor package should enter a package C state based on energy consumption values for entry into and exit from the package C state, an amount of time the semiconductor package stayed in the package C state previously, and one or more breakeven time points between the various package C states, wherein an imaging computational unit of the semiconductor package is to operate at a first frequency that is higher than a second frequency, wherein the second frequency is to be indicated by an imaging driver of an operating system, wherein the imaging computational unit is to operate at a higher frequency to enter a low power consumption state in response to detection of a delay by the imaging computational unit of the semiconductor package to enter the low power consumption state relative to one or more other computational units of the semiconductor package, wherein the semiconductor package is to remain in its current state based at least in part on comparison of a monitored time spent at the package C state and at least one of the one or more breakeven time points. 
 
     
     
       2. The apparatus of  claim 1 , comprising logic to calculate the energy consumption values for entry into and exit from the package C state. 
     
     
       3. The apparatus of  claim 1 , further comprising one or more sensors to detect variations in one or more of: temperature, operating frequency, operating voltage, power consumption, inter-core communication activity, processing unit status, or processing unit workload. 
     
     
       4. The apparatus of  claim 3 , wherein the processing unit is to comprise a general-purpose processing unit, a graphics processing unit, and the imaging computational unit. 
     
     
       5. The apparatus of  claim 1 , wherein the semiconductor package is to comprise a processor having one or more processor cores. 
     
     
       6. The apparatus of  claim 1 , wherein one or more of: the logic, a processor having one or more processor cores, and memory are on a single integrated circuit. 
     
     
       7. The apparatus of  claim 1 , wherein a battery pack is to supply power to the logic. 
     
     
       8. An apparatus comprising:
 logic, at least a portion of which is in hardware, to detect a delay by an imaging computational unit of a processor to enter a low power consumption state relative to one or more other computational units of the processor, wherein the logic is to cause the imaging computational unit to operate at a higher frequency to enter the low power consumption state in response to detection of the delay, wherein the imaging computational unit of the processor is to operate at a first frequency that is higher than a second frequency, wherein the second frequency is to be indicated by an imaging driver of an operating system, wherein a semiconductor package that comprises the processor is to remain in its current state based at least in part on comparison of a monitored time spent at the package C state and at least one of the one or more breakeven time points. 
 
     
     
       9. The apparatus of  claim 8 , wherein the one or more other computational units of the processor are to comprise a general-purpose processing unit and a graphics processing unit. 
     
     
       10. The apparatus of  claim 8 , comprising logic to determine whether the semiconductor package, should enter a package C state based on energy consumption values for entry into and exit from the package C state, an amount of time the semiconductor package stayed in the package C state previously, and one or more breakeven time points between the various package C states. 
     
     
       11. The apparatus of  claim 10 , comprising logic to calculate the energy consumption values for entry into and exit from the package C state. 
     
     
       12. The apparatus of  claim 10 , further comprising one or more sensors to detect variations in one or more of: temperature, operating frequency, operating voltage, power consumption, inter-core communication activity, processing unit status, or processing unit workload. 
     
     
       13. The apparatus of  claim 8 , wherein the processor is to comprise one or more processor cores. 
     
     
       14. The apparatus of  claim 8 , wherein one or more of: the logic, the processor having one or more processor cores, and memory are on a single integrated circuit. 
     
     
       15. The apparatus of  claim 8 , wherein a battery pack is to supply power to the logic. 
     
     
       16. A non-transitory computer-readable medium comprising one or more instructions that when executed on a processor configure the processor to perform one or more operations to:
 determine whether a semiconductor package should enter a package C state based on energy consumption values for entry into and exit from the package C state, an amount of time the semiconductor package stayed in the package C state previously, and one or more breakeven time points between the various package C states, wherein an imaging computational unit of the semiconductor package is to operate at a first frequency that is higher than a second frequency, wherein the second frequency is to be indicated by an imaging driver of an operating system, wherein the imaging computational unit is to operate at a higher frequency to enter a low power consumption state in response to detection of a delay by the imaging computational unit of the semiconductor package to enter the low power consumption state relative to one or more other computational units of the semiconductor package, wherein the semiconductor package is to remain in its current state based at least in part on comparison of a monitored time spent at the package C state and at least one of the one or more breakeven time points. 
 
     
     
       17. The computer-readable medium of  claim 16 , further comprising one or more instructions that when executed on the processor configure the processor to perform one or more operations to calculate the energy consumption values for entry into and exit from the package C state. 
     
     
       18. A non-transitory computer-readable medium comprising one or more instructions that when executed on a processor configure the processor to perform one or more operations to:
 detect a delay by an imaging computational unit of the processor to enter a low power consumption state relative to one or more other computational units of the processor, wherein the imaging computational unit is to operate at a higher frequency to enter the low power consumption state in response to detection of the delay, wherein the imaging computational unit of the semiconductor package is to operate at a first frequency that is higher than a second frequency, wherein the second frequency is to be indicated by an imaging driver of an operating system, wherein a semiconductor package that comprises the processor is to remain in its current state based at least in part on comparison of a monitored time spent at the package C state and at least one of the one or more breakeven time points. 
 
     
     
       19. The computer-readable medium of  claim 18 , wherein the one or more other computational units of the processor are to comprise a general-purpose processing unit and a graphics processing unit. 
     
     
       20. The computer-readable medium of  claim 18 , further comprising one or more instructions that when executed on the processor configure the processor to perform one or more operations to determine whether a semiconductor package, which is to comprise the processor, should enter a package C state based on energy consumption values for entry into and exit from the package C state, an amount of time the semiconductor package stayed in the package C state previously, and one or more breakeven time points between the various package C states. 
     
     
       21. The computer-readable medium of  claim 20 , further comprising one or more instructions that when executed on the processor configure the processor to perform one or more operations to calculate the energy consumption values for entry into and exit from the package C state. 
     
     
       22. The apparatus of  claim 1 , wherein a length of time spent at the package C state is to be monitored.