US10134836B2ActiveUtilityPatentIndex 72
Semiconductor device and method of fabricating the same
Est. expiryFeb 2, 2037(~10.6 yrs left)· nominal 20-yr term from priority
Inventors:Zhou zhi-biao
H10P 95/062H10W 20/20H10W 10/181H10W 10/061H10W 10/021H10W 10/20H10P 90/1906H01L 29/66545H01L 21/84H01L 21/76289H01L 28/10H01L 29/0649H01L 23/535H01L 27/1203H10D 86/201H10D 86/01H10D 64/017H10D 1/20H10D 62/115
72
PatentIndex Score
2
Cited by
9
References
3
Claims
Abstract
A semiconductor device and a method of fabricating the same are provide. The fabricating method includes providing a silicon-on-insulator (SOI) substrate that includes, from bottom to top, a substrate, a first insulating layer and a semiconductor layer. The semiconductor layer is patterned to form a plurality of dummy patterns. A second insulating layer is formed around the plurality of dummy patterns. The plurality of dummy patterns are removed to form a plurality of openings. A dielectric structure is formed on the substrate and fills into the plurality of openings.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A method of fabricating a semiconductor device, comprising:
providing a semiconductor-on-insulator (SOI) substrate, wherein the SOI substrate comprises, from bottom to top, a substrate, a first insulating layer and a semiconductor layer;
patterning the semiconductor layer to form a plurality of dummy patterns;
forming a second insulating layer around the plurality of dummy patterns;
removing the plurality of dummy patterns to form a plurality of openings; and
forming a dielectric structure on the substrate, wherein the dielectric structure fills into the plurality of openings,
wherein the method further comprises, after forming the second insulating layer around the plurality of dummy patterns, forming an etching stop layer on the substrate and patterning the etching stop layer, and
wherein the method further comprises:
before forming the etching stop layer on the substrate, forming a gate dielectric layer on the substrate;
forming a plurality of dummy gates on the gate dielectric layer, the plurality of dummy gates corresponding to the plurality of dummy patterns; and
before removing the plurality of dummy patterns, removing the plurality of dummy gates and a portion of the gate dielectric layer.
2. The method of claim 1 , further comprising:
after removing the plurality of dummy patterns to form the plurality of openings, forming an etching stop layer on the substrate, wherein the etching stop layer covers a surface of the second insulating layer and sidewalls and bottoms of the plurality of openings.
3. A method of fabricating a semiconductor device, comprising:
providing a semiconductor-on-insulator (SOI) substrate, wherein the SOI substrate comprises, from bottom to top, a substrate, a first insulating layer and a semiconductor layer;
patterning the semiconductor layer to form a plurality of dummy patterns;
forming a second insulating layer around the plurality of dummy patterns;
removing the plurality of dummy patterns to form a plurality of openings; and
forming a dielectric structure on the substrate, wherein the dielectric structure fills into the plurality of openings,
wherein the method further comprises, after forming the second insulating layer around the plurality of dummy patterns, forming an etching stop layer on the substrate and patterning the etching stop layer, and
wherein the step of forming the dielectric structure on the substrate comprises:
before patterning the etching stop layer, forming a first dielectric layer on the etching stop layer and patterning the first dielectric layer to form a first patterned dielectric layer; and
after patterning the etching stop layer and removing the plurality of dummy patterns, forming a second dielectric layer, wherein the second dielectric layer covers the first patterned dielectric layer and fills into the plurality of openings.Cited by (0)
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