Methods of forming semiconductor structures

Abstract

The present disclosure relates to a process for the manufacture of a high resistivity semiconductor substrate, comprising the following stages: providing a first substrate with an in-depth weakened layer; providing a second substrate with a layer of an oxide at the surface; attaching the first substrate to the second substrate so as to form a compound substrate comprising a layer of buried oxide; and cleaving the compound substrate at the level of the weakened layer. The process additionally comprises at least one stage of stabilization, in particular, a stabilization heat treatment, of the second substrate with the layer of oxide before the stage of cleaving at the level of the weakened layer.

What is claimed is: 
     
       1. A method of forming a semiconductor structure, the method comprising:
 providing a first substrate with an in-depth weakened layer; 
 providing a second substrate with an oxide layer at a surface thereof; 
 attaching the first substrate to the second substrate to form a compound substrate comprising a buried oxide layer, the first substrate comprising the in-depth weakened layer, the second substrate comprising the oxide layer; 
 stabilizing at least the second substrate with the oxide layer at the surface; and 
 after stabilizing at least the second substrate, cleaving the compound substrate at the weakened layer to form a semiconductor structure. 
 
     
     
       2. The method of  claim 1 , wherein stabilizing at least the second substrate comprises stabilizing at least the second substrate before attaching the first substrate to the second substrate. 
     
     
       3. The method of  claim 1 , wherein stabilizing at least the second substrate comprises nucleation, precipitation of precipitates, and growth of the precipitates. 
     
     
       4. The method of  claim 1 , wherein stabilizing at least the second substrate comprises heat treating at least the second substrate at each of a plurality of temperatures within a range from approximately 650° C. to approximately 1,200° C. 
     
     
       5. The method of  claim 4 , wherein each of the plurality of temperatures is maintained for a duration with a range extending from approximately 30 minutes to approximately 10 hours. 
     
     
       6. The method of  claim 4 , wherein heat treating at least the second substrate comprises exposing at least the second substrate to a nonoxidizing atmosphere. 
     
     
       7. The method of  claim 4 , wherein heat treating at least the second substrate comprises exposing at least the second substrate to an oxidizing atmosphere. 
     
     
       8. The method of  claim 7 , wherein exposing at least the second substrate to an oxidizing atmosphere comprises exposing at least the second substrate to an atmosphere comprising water and oxygen. 
     
     
       9. The method of  claim 1 , further comprising forming the weakened layer by ion implantation in the first substrate. 
     
     
       10. The method of  claim 1 , further comprising annealing the semiconductor substrate after cleaving the compound substrate at the weakened layer. 
     
     
       11. The method of  claim 10 , wherein annealing the semiconductor structure comprises exposing the semiconductor structure to a temperature within a range from approximately 1,075° C. to approximately 1,250° C. 
     
     
       12. The method of  claim 11 , wherein annealing the semiconductor structure comprises exposing the semiconductor structure to a temperature within a range from approximately 1,175° C. to approximately 1,230° C. 
     
     
       13. The method of  claim 10 , wherein annealing the semiconductor structure comprises exposing the semiconductor structure to an annealing condition for a period of time within a range from approximately 15 seconds to approximately 120 seconds. 
     
     
       14. The method of  claim 13 , wherein annealing the semiconductor structure comprises exposing the semiconductor structure to an annealing condition for a period of time within a range from approximately 20 seconds to approximately 90 seconds. 
     
     
       15. The method of  claim 10 , wherein annealing the semiconductor structure comprises exposing the semiconductor structure to a nonoxidizing atmosphere. 
     
     
       16. The method of  claim 15 , wherein exposing the semiconductor structure to a nonoxidizing atmosphere comprises exposing the semiconductor structure to an atmosphere comprising at least one gas selected from the group consisting of hydrogen and argon. 
     
     
       17. The method of  claim 16 , wherein exposing the semiconductor structure to a nonoxidizing atmosphere comprises exposing the semiconductor structure to an atmosphere comprising approximately 50% hydrogen or less. 
     
     
       18. The method of  claim 1 , further comprising attaching a residue of the first substrate to a third substrate after cleaving the compound substrate at the weakened layer, the third substrate comprising a layer of an oxide. 
     
     
       19. The method of  claim 1 , wherein the first substrate comprises a semiconductor material. 
     
     
       20. The method of  claim 1 , wherein the second substrate comprises silicon.