US10163862B2ActiveUtilityA1

Package structure and method for forming same

86
Assignee: TAIWAN SEMICONDUCTOR MFG CO LTDPriority: Jun 29, 2015Filed: Dec 9, 2016Granted: Dec 25, 2018
Est. expiryJun 29, 2035(~9 yrs left)· nominal 20-yr term from priority
H10W 90/722H10W 90/28H10W 70/099H10W 72/073H10W 72/884H10W 72/874H10W 90/754H10W 72/9413H10W 70/09H10W 70/60H10W 72/241H10W 90/734H10W 90/732H10W 70/614H10W 90/701H10W 70/635H10W 74/117H10W 70/095H10W 90/00H10W 72/20H10W 90/297H10W 72/823H10W 72/01H10W 74/129H01L 24/73H01L 2224/48227H01L 24/19H01L 2225/06541H01L 23/3128H01L 2224/73267H01L 24/48H01L 2225/0651H01L 2225/06568H01L 25/50H01L 24/20H01L 21/486H01L 2225/06548H01L 23/49816H01L 2224/48091H01L 2225/06527H01L 2224/32225H01L 2224/04105H01L 2924/00014H01L 2224/45099H01L 23/5389H01L 2224/12105H01L 2224/73265H01L 2225/06513H01L 25/105H01L 2924/15311H01L 25/0657H01L 2224/32145H01L 2924/00H01L 24/32H01L 24/92H01L 23/3114H01L 2224/92244H01L 2225/1041H01L 2225/1058H01L 23/49827H01L 2924/00012H01L 2225/1035
86
PatentIndex Score
4
Cited by
40
References
20
Claims

Abstract

A device comprises a bottom package comprising an interconnect structure, a molding compound layer over the interconnect structure, a semiconductor die in the molding compound layer and a solder layer embedded in the molding compound layer, wherein a top surface of the solder layer is lower than a top surface of the molding compound layer and a top package bonded on the bottom package through a joint structure formed by the solder layer and a bump of the top package.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A device comprising:
 a bottom package comprising:
 a molding compound layer on a first side of an interconnect layer; 
 a through via in the molding compound layer; and 
 a solder layer on a top surface of the through via, wherein the molding compound layer is a single continuous layer and extends from a sidewall of the solder layer to a sidewall of the through via; 
 
 a metal layer over a topmost surface of the solder layer; and 
 a top package bonded over the bottom package, wherein:
 the top package comprises a first bump, and wherein the first bump and the solder layer form a joint structure between the top package and the bottom package, wherein a sidewall of a lower portion of the first bump is surrounded by the metal layer. 
 
 
     
     
       2. The device of  claim 1 , further comprising:
 a second bump formed on a second side of the interconnect layer. 
 
     
     
       3. The device of  claim 1 , wherein:
 the interconnect layer comprises at least an interconnect dielectric layer and a metal line formed in the interconnect dielectric layer. 
 
     
     
       4. The device of  claim 1 , further comprising:
 a semiconductor die in direct contact with the interconnect layer. 
 
     
     
       5. The device of  claim 4 , wherein:
 a top surface of the solder layer is lower than a first side of the semiconductor die. 
 
     
     
       6. The device of  claim 5 , wherein:
 a lower portion of the joint structure is below the first side of the semiconductor die. 
 
     
     
       7. The device of  claim 1 , further comprising:
 a dielectric layer over the molding compound layer, wherein the dielectric layer is formed of polybenzoxazole (PBO). 
 
     
     
       8. The device of  claim 1 , further comprising:
 a nickel layer between the top surface of the through via and the solder layer. 
 
     
     
       9. A device comprising:
 a bottom package comprising an interconnect structure, a molding compound layer over the interconnect structure, a dielectric layer on the molding compound layer, a semiconductor die in the molding compound layer, a solder layer embedded in the molding compound layer and a seed layer over a topmost surface of the solder layer, the seed layer extending from a topmost surface of the molding compound layer to the topmost surface of the solder layer, wherein:
 the topmost surface of the solder layer is lower than a top surface of the molding compound layer; and 
 
 the molding compound layer is a single continuous layer and extends from a sidewall of the solder layer to a sidewall of the semiconductor die; and 
 a top package bonded on the bottom package through a joint structure formed by the solder layer and a bump of the top package. 
 
     
     
       10. The device of  claim 9 , where:
 a substrate side of the semiconductor die is bonded on the dielectric layer; and 
 an interconnect side of the semiconductor die is in direct contact with the interconnect structure. 
 
     
     
       11. The device of  claim 9 , wherein:
 a distance between a bottom surface of the top package and a top surface of the bottom package is 30 micrometers. 
 
     
     
       12. The device of  claim 9 , wherein:
 a top surface of a substrate side of the semiconductor die is higher than the topmost surface of the solder layer. 
 
     
     
       13. The device of  claim 9 , wherein:
 a height of the solder layer is in a range from 30 micrometers to 50 micrometers. 
 
     
     
       14. The device of  claim 9 , further comprising:
 a through via connected between a bottom surface of the solder layer and the interconnect structure. 
 
     
     
       15. The device of  claim 14 , further comprising:
 a nickel layer formed between the through via and the solder layer. 
 
     
     
       16. A device comprising:
 an interconnect structure comprising a plurality of metal lines; 
 a molding compound layer over the interconnect structure; 
 a semiconductor die in the molding compound layer; 
 a via in the molding compound layer, wherein the molding compound layer is a single continuous layer and extends from a sidewall of the via to a sidewall of the semiconductor die; 
 a nickel layer over and in contact with a top surface of the via; 
 a solder layer over and in contact with the nickel layer, wherein:
 a top surface of the solder layer is lower than a top surface of the molding compound layer; 
 
 a metal layer extending from a topmost surface of the molding compound layer to a topmost surface of the solder layer; and 
 a top package bonded on a bottom package through a joint structure formed by the solder layer and a bump of the top package. 
 
     
     
       17. The device of  claim 16 , further comprising:
 a dielectric layer on the molding compound layer, wherein the semiconductor die is between the dielectric layer and the interconnect structure. 
 
     
     
       18. The device of  claim 17 , wherein:
 the dielectric layer, the molding compound layer, the interconnect structure, the semiconductor die, the via, the nickel layer and the solder layer form the bottom package. 
 
     
     
       19. The device of  claim 16 , wherein:
 a lower portion of the joint structure is surrounded by the molding compound layer. 
 
     
     
       20. The device of  claim 16 , wherein:
 the metal layer extends only from the topmost surface of the molding compound layer to the topmost surface of the solder layer.

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