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US10217829B2ActiveUtilityPatentIndex 52

Compound semiconductor device including diffusion preventing layer to suppress current collapse phenomenon, method of manufacturing compound semiconductor device, power supply unit, and amplifier

Assignee: FUJITSU LTDPriority: Sep 29, 2016Filed: Aug 24, 2017Granted: Feb 26, 2019
Est. expirySep 29, 2036(~10.2 yrs left)· nominal 20-yr term from priority
Inventors:MAKIYAMA KOZO
H10P 76/2045H10P 50/283H10P 50/246H10P 50/73H10P 14/69433H10P 14/6682H10P 14/6336H10P 14/3416H10P 14/3216H10P 14/24H10P 14/6312H10W 90/756H10W 74/129H10W 74/00H10W 72/5363H10W 72/926H10W 70/481H10W 70/465H10W 70/417H10W 74/111H01L 21/0262H03F 3/195H01L 21/31116H01L 29/7786H01L 21/0217H01L 29/42376H01L 21/31144H01L 23/49513H01L 21/0254H01L 29/2003H01L 29/7787H01L 29/66462H03F 3/21H01L 21/02211H01L 23/49562H01L 21/0277H02M 1/4208H01L 21/30621H01L 23/3107H01L 29/205H01L 29/41766H01L 23/4952H01L 21/02458H03F 1/3247H03F 3/245H01L 23/3114H03F 2200/451H02M 5/4585H01L 21/02274H01L 21/02241H03F 1/3241H03F 1/3205H01L 29/408H03F 3/1935H10D 64/256H10D 62/8503H10D 64/518H10D 62/824H10D 30/4755H10D 30/475H10D 30/015H10D 64/118
52
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References
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Claims

Abstract

A compound semiconductor device disclosed herein includes a substrate, an electron transit layer formed on the substrate, a compound semiconductor layer containing gallium and formed on the electron transit layer, a diffusion preventing layer containing gallium oxide and formed on the compound semiconductor layer, an insulation layer formed on the diffusion preventing layer, and a source electrode, a drain electrode, and a gate electrode formed over the electron transit layer at a distance from one another.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A compound semiconductor device comprising:
 a substrate; 
 an electron transit layer formed on the substrate; 
 a compound semiconductor layer containing gallium and formed on the electron transit layer; 
 a diffusion preventing layer containing gallium oxide and formed on the compound semiconductor layer; 
 an insulation layer formed on the diffusion preventing layer; 
 a source electrode, a drain electrode, and a gate electrode formed over the electron transit layer at a distance from one another; and 
 a barrier layer formed on the electron transit layer, 
 wherein the compound semiconductor layer is a cap layer of gallium nitride formed on the barrier layer, and 
 the cap layer includes:
 an upper layer located close to the diffusion preventing layer; and 
 a lower layer located below the upper layer, 
 
 wherein a composition ratio of gallium in the upper layer is smaller than a composition ratio of gallium in the lower layer. 
 
     
     
       2. A power supply unit comprising:
 the compound semiconductor device according to  claim 1 . 
 
     
     
       3. An amplifier comprising:
 the compound semiconductor device according to  claim 1 . 
 
     
     
       4. A compound semiconductor device comprising:
 a substrate; 
 an electron transit layer formed on the substrate; 
 a compound semiconductor layer containing gallium and formed on the electron transit layer; 
 a diffusion preventing layer containing gallium oxide and formed on the compound semiconductor layer; 
 an insulation layer formed on the diffusion preventing layer; and 
 a source electrode, a drain electrode, and a gate electrode formed over the electron transit layer at a distance from one another, 
 wherein the compound semiconductor layer is a barrier layer formed on the electron transit layer, 
 the barrier layer contains III group element other than the gallium, 
 the diffusion preventing layer contains an oxide of the III group element other than the gallium oxide, and 
 the barrier layer includes:
 an upper layer located close to the diffusion preventing layer; and 
 a lower layer located below the upper layer, 
 
 wherein a composition ratio of the III group element in the upper layer is smaller than a composition ratio of the III group element in the lower layer. 
 
     
     
       5. The compound semiconductor device according to  claim 4 , wherein the III group element is aluminum, and
 the barrier layer is an aluminum gallium nitride layer. 
 
     
     
       6. The compound semiconductor device according to  claim 4 , wherein the III group element includes aluminum and indium, and
 the barrier layer is an aluminum gallium nitride layer to which indium is added. 
 
     
     
       7. A power supply unit comprising:
 the compound semiconductor device according to  claim 4 . 
 
     
     
       8. An amplifier comprising:
 the compound semiconductor device according to  claim 4 . 
 
     
     
       9. A method of manufacturing a compound semiconductor device, the method comprising:
 forming an electron transit layer on a substrate; 
 forming a compound semiconductor layer containing gallium on the electron transit layer; 
 forming a diffusion preventing layer containing gallium oxide on the compound semiconductor layer; 
 forming an insulation layer on the diffusion preventing layer; 
 forming a source electrode, a drain electrode, and a gate electrode over the electron transit layer at a distance from one another; and 
 forming a barrier layer on the electron transit layer, 
 wherein the compound semiconductor layer is a cap layer of gallium nitride formed on the barrier layer, and 
 the cap layer includes:
 an upper layer located close to the diffusion preventing layer; and 
 a lower layer located below the upper layer, 
 
 wherein a composition ratio of gallium in the upper layer is smaller than a composition ratio of gallium in the lower layer. 
 
     
     
       10. The method of manufacturing a compound semiconductor device according to  claim 9 , wherein
 the forming of the diffusion preventing layer is performed by oxidizing the compound semiconductor layer. 
 
     
     
       11. A method of manufacturing a compound semiconductor device, the method comprising:
 forming an electron transit layer on a substrate; 
 forming a compound semiconductor layer containing gallium on the electron transit layer; 
 forming a diffusion preventing layer containing gallium oxide on the compound semiconductor layer; 
 forming an insulation layer on the diffusion preventing layer; and 
 forming a source electrode, a drain electrode, and a gate electrode over the electron transit layer at a distance from one another, 
 wherein the compound semiconductor layer is a barrier layer formed on the electron transit layer, 
 the barrier layer contains III group element other than the gallium, 
 the diffusion preventing layer contains an oxide of the III group element other than the gallium oxide, and 
 the barrier layer includes:
 an upper layer located close to the diffusion preventing layer; and 
 a lower layer located below the upper layer, 
 
 wherein a composition ratio of the III group element in the upper layer is smaller than a composition ratio of the III group element in the lower layer.

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