Semiconductor integrated circuit device comprising MISFETs in SOI and bulk substrate regions

Abstract

The semiconductor integrated circuit device has a hybrid substrate structure which includes both of an SOI structure and a bulk structure on the side of the device plane of a semiconductor substrate. In the device, the height of a gate electrode of an SOI type MISFET is higher than that of a gate electrode of a bulk type MISFET with respect to the device plane.

What is claimed is: 
     
       1. A semiconductor integrated circuit device comprising:
 a semiconductor substrate having a first region and a second region; 
 a first MISFET formed in the first region, and a second MISFET formed in the second region; and 
 an interlayer insulative film formed over the semiconductor substrate; 
 wherein the first MISFET is comprised of: 
 an insulator layer formed on a surface of the semiconductor substrate in the first region; 
 a semiconductor layer formed on the insulator layer; 
 a first gate insulative film formed over the semiconductor layer; and 
 a first gate electrode formed over the first gate insulative film, 
 wherein the second MISFET is comprised of: 
 a second gate insulative film formed over the surface of the semiconductor substrate in the second region, and 
 a second gate electrode formed over the second gate insulative film, 
 wherein a height of a top surface of the first gate electrode from the surface of the semiconductor substrate is higher than a height of a top surface of the second gate electrode from the surface of the semiconductor substrate, 
 wherein a thickness of the first gate electrode is thicker than a thickness of the second gate electrode, 
 wherein the first gate electrode comprises a first conductive film, and the top surface of the first gate electrode is exposed from the interlayer insulative film, and 
 wherein the second gate electrode comprises a second conductive film, and the top surface of the second gate electrode is covered with the interlayer insulative film. 
 
     
     
       2. The semiconductor integrated circuit device according to  claim 1 ,
 wherein a gate length of the first gate electrode is greater than 4 times of a thickness of the semiconductor layer. 
 
     
     
       3. The semiconductor integrated circuit device according to  claim 1 ,
 wherein a thickness of the semiconductor layer is thinner than the thickness of second gate electrode. 
 
     
     
       4. The semiconductor integrated circuit device according to  claim 1 ,
 wherein a thickness of the insulator layer is less than 15 nm. 
 
     
     
       5. The semiconductor integrated circuit device according to  claim 1 ,
 wherein a thickness of the semiconductor layer is less than 20 nm. 
 
     
     
       6. The semiconductor integrated circuit device according to  claim 1 ,
 wherein a height of a top surface of the semiconductor layer is higher than a height of a top surface of the semiconductor substrate. 
 
     
     
       7. The semiconductor integrated circuit device according to  claim 1 ,
 wherein the second gate electrode of the second MISFET comprises a silicon film and a metal silicide film formed on the silicon film.